High density self-aligned antifuse

Active solid-state devices (e.g. – transistors – solid-state diode – Non-single crystal – or recrystallized – semiconductor... – Non-single crystal – or recrystallized – active junction...

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257530, 257764, 438 33, 438 67, 438 48, H01L 2938, H01L 2348

Patent

active

060876778

ABSTRACT:
The present invention is an antifuse structure comprising an insulation layer between a top conductor and a bottom conductor. The insulation layer has a via. A resistive layer is adjacent the via and a plug is adjacent the resistive layer. The plug is in the via and is also adjacent the top conductor.
The present invention also provides a method for fabricating the antifuse on a base. A bottom conductor is deposited on the base. An insulation layer are deposited adjacent the bottom conductor. An antifuse via is etched into the insulation layer. A resistive layer is deposited in the antifuse via. A plug is deposited. The plug extends into the antifuse via. A top conductor is deposited and patterned adjacent the plug.

REFERENCES:
patent: 3873383 (1975-03-01), Kooi
patent: 4576538 (1985-10-01), Suzuki
patent: 4837178 (1989-06-01), Ohshima et al.
patent: 5578836 (1996-11-01), Husher et al.
patent: 5763898 (1998-06-01), Forouhi et al.
K.E. Gordon, et al., "Conducting Filament of the Programmed Metal Electrode Amorphous Silicon Antifuse," 0-7803-1450-6 (1993) IEEE, IEDM 93-27, pp. 2.6. 1-2.6.4.
L. Geppert, Sr. Associate Editor, "Solid State," IEEE Spectrum (Jan. 1997), pp. 55-59.

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