High density ROM with select lines

Static information storage and retrieval – Floating gate – Particular connection

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Details

365 51, 365 63, 365104, 36518901, G11C 1134

Patent

active

054935270

ABSTRACT:
A read only memory cell array and method of operation thereof comprises an array of memory transistor cells, a plurality of word lines, a plurality of bit lines, a plurality of select bit lines, a plurality of bank select lines for enabling reading of a selected bank in the array connected to bank select transistors in the bank, a select even line adapted for enabling reading of even cells in a selected bank connected to select even cell transistors in the bank, and a select odd line adapted for enabling reading of odd cells in a selected bank connected to select odd cell transistors in the array.

REFERENCES:
patent: 5117389 (1992-05-01), Yiu
patent: 5241497 (1993-08-01), Komarek
patent: 5268861 (1993-12-01), Hotta

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