Fishing – trapping – and vermin destroying
Patent
1994-06-17
1995-05-23
Thomas, Tom
Fishing, trapping, and vermin destroying
437 29, 437 40, 437 48, 148DIG88, H01L 218246
Patent
active
054181780
ABSTRACT:
A method for fabricating read-only memory ("ROM") devices utilizing junction field-effect transistors ("JFETs") having a conductive channel orthogonally oriented with respect to the surface of the semiconductor material composing the JFET. A fixed-position ion beam is employed to create this narrow gate channel, which extends between the JFET's source and drain contact. Employing such JFETs as basic memory sites within a semiconductor ROM circuit allows for an architecture that conforms to a minimum lattice structure layout. In addition, the resulting ROM offers high speed access of data. Although JFETs have not been utilized as the transistor of choice within ROMs because of their seemingly inferior performance when compared to MOSFETs, the invention provides a novel architecture which significantly enhances the practicality of the JFET as a memory device.
REFERENCES:
patent: 4067036 (1978-01-01), Yoshida et al.
patent: 4328511 (1982-05-01), Tasch, Jr. et al.
patent: 5243209 (1993-09-01), Ishii
patent: 5358887 (1994-10-01), Hong
AT&T Corp.
Marley Robert P.
Thomas Tom
LandOfFree
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