High density programmable memory array

Static information storage and retrieval – Floating gate – Particular biasing

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365203, 365230, G11C 1140

Patent

active

047275154

ABSTRACT:
An array of electrically alterable floating gate devices arranged in rows and columns with each column of devices sharing a column conductor. Each row of devices is connected between two row conductors with adjacent rows sharing a common row conductor whereby in an array having N rows of devices there is a total of (N+1) row conductors. Input and output decoders connected to the row conductors enable the unique read-out of any selected element.

REFERENCES:
patent: 4282446 (1981-08-01), McElroy
patent: 4417328 (1983-11-01), Ochii
patent: 4434478 (1984-02-01), Cook et al.
patent: 4451905 (1984-05-01), Moyer

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