High-density programmable logic device in a multi-chip module pa

Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices

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174261, 257786, 257723, 257724, 361760, 361777, H05K 702, H05K 116

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056422628

ABSTRACT:
A high performance single package multi-chip module multiplies the logic density of the highest density monolithic programmable logic device (PLD). A dual-sided substrate carries multiple prepackaged PLDs on a top side and a field programmable interconnect (FPIC) die on a bottom side. The input/output terminals of the PLDs are interconnected with the FPIC die in a scrambled fashion to reduce signal skew.

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Dave Bursky, "CPLD Module Packs 50k Usable Gates, 360 I/O Pins," brochure from Altera Corporation reprinted from Electronic Design, Apr. 4, 1994, 4 pp.
IBM Technical Disclosure Bulletin "Error Detection And Fault Isolation Packaging For Circuit Chips" vol. 30 No. 9 pp. 1 and 2, Feb. 1988.

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