Etching a substrate: processes – Forming or treating electrical conductor article – Forming or treating of groove or through hole
Patent
1997-10-28
2000-09-12
Sergent, Rabon
Etching a substrate: processes
Forming or treating electrical conductor article
Forming or treating of groove or through hole
216 67, 216 75, 216 79, 216 80, 438695, 438710, H01L 21467, H01L 2132, H01L 21308, H01L 21762
Patent
active
061173452
ABSTRACT:
A method for depositing dielectric material into gaps between wiring lines in the formation of a semiconductor device includes the formation of a cap layer and the formation of gaps into which high density plasma chemical vapor deposition (HDPCVD) dielectric material is deposited. First and second antireflective coatings may be formed on the wiring line layer, the first and second antireflective coatings being made from different materials. Both antireflective coatings and the wiring line layer are etched through to form wiring lines separated by gaps. The gaps between wiring lines may be filled using high density plasma chemical vapor deposition.
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J.T. Pye, et al., "High-Density Plasma CVD and CMP for 0.25-.mu.m Intermetal Dielectric Processing," Solid State Technology, Dec. 1995, pp. 65-69.
Liu Chih-Chien
Lur Water
Shieh Wen-Bin
Sun Shih-Wei
Tseng Ta-Shan
Sergent Rabon
United Microelectronics Corp.
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