High density plasma chemical vapor deposition chamber

Coating apparatus – Gas or vapor deposition – With treating means

Reexamination Certificate

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Details

C118S7230ER, C156S345480, C156S345340

Reexamination Certificate

active

06474257

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a high density plasma (HDP) chemical vapor deposition (CVD) chamber. Particularly, the present invention relates to a high density plasma chemical vapor deposition chamber with an upper wall composed by two ceramic layers having a defaulted distance between them.
BACKGROUND OF THE INVENTION
A high density plasma (HDP) chemical vapor deposition (CVD) chamber is an apparatus for a CVD process to a wafer at a lower temperature.
Referring to
FIG. 1
, it shows a cross sectional view of a conventional HDP CVD chamber
10
. While current flows through the inductive coil
14
deposed outside the upper wall
12
of the chamber
10
, the inductive coil
14
creates inductance and an electric field is induced. The electric field induces an inductive current through mediums (such as air) and emits energy in the form of plasma within the chamber
10
ultimately so that a region of plasma is generated. The processing gas
22
is introduced into the chamber
10
through a plurality of nozzles
16
in the edge of the chamber
10
, so that the uniformity to the thickness of the deposited film is directly influenced by the number and the direction of the nozzles
16
, and results the problem of pattern reproduce in the specificity of the wafer thickness. Due to the processing gas
22
is introduced into the chamber
10
through a plurality of nozzles
16
in the edge of the chamber
10
, so the thickness deposited on the edge of the wafer
18
is greater than the center of the wafer
18
upon the susceptor
20
and leads the thickness of the center of the wafer
18
to be thinner.
Referring to
FIG. 2
, it shows a cross sectional view of a conventional HDP CVD chamber
30
. The upper wall
32
of the chamber
30
is in the shape of rectangle and a single nozzle
44
is installed in the middle of it. The region of plasma within the chamber
30
is formed by current flowing through the inductive coil
34
. The processing gas
42
can be introduced into the chamber
30
through the around nozzles
36
and be done through the nozzle
44
also. Referring to
FIG. 4
, it shows the thickness distribution of a deposited wafer
38
on the susceptor
40
by applying the HDP CVD chamber
30
shown in FIG.
2
. Shown in
FIG. 4
, the positions of the arrows are where the nozzles
36
are and each line, such as mark
100
, in the drawing is a contour line, so it is discovered that the thickness of film deposited on the wafer
38
is not uniform. The fault to the thinner center thickness of the wafer
10
will be improved by using the deposited wafer
38
. However, the problem of pattern reproduce from nozzles also exists.
For the foregoing reasons, there is a need for a different design of the flux of the processing gas within the chamber to enhance the thickness uniformity of the deposited film in the HDP CVD chamber and to avoid the problem of pattern reproduce from nozzles in order to provide the need of increasing the wafer size or decreasing the size of the semiconductor component in future.
SUMMARY OF THE INVENTION
According to the background of the invention, the processing gas of the conventional HDP CVD chamber is introduced into the chamber through the nozzles in the compass, so that results in a lack of uniformity to the deposited film thickness and the problem of the pattern reproduce in the specificity of the wafer thickness exists. As a result, the present invention is directed to a design to the flux of the processing gas within the chamber that satisfies the foregoing needs to improved the disadvantage of the prior art.
In one aspect of the invention, the present invention provides a HDP CVD chamber, and an upper wall of the chamber is composed by two layers having a defaulted distance between, wherein the distribution and the number of the nozzles on the inner layer of the upper wall can be adjusted according to desire. The number of the nozzles is greater than the slender nozzles of the conventional chamber, so the uniformity to the distribution of the gases within the chamber can be enhanced.
In another aspect of the invention, the present invention provides a HDP CVD chamber, and the upper wall of the chamber includes an outer layer and an inner layer. Between the outer layer and the inner layer, there is a defaulted distance to form a channel. The outer layer is a smooth-faced structure and a plurality of nozzles is distributed in the form of concentric circles on the inner layer. As a result of the number of the nozzles of the present invention is greater than the prior art, the distribution to the airflow of the processing gas is more average within the chamber so that the thickness of the deposited film is more uniform in order to consist with the need of the increasing wafer size or the decreasing semiconductor device size.
For reasons discuss above, the present invention provides a HDP CVD chamber. The upper wall of the chamber in the present invention is composed of ceramic, and the upper wall of the chamber includes an outer layer and an inner layer. Between the outer layer and the inner layer, there is a defaulted distance to form a channel. The upper wall of the chamber composed of insulated ceramic that can be penetrated by the magnetic field created by the inductive coil entwined outside the outer layer to form a HDP within the chamber. Specially, the processing gas is introduced into the channel between the outer layer and inner layer, and then it flows into the chamber through the nozzles on the inner layer. As a result of the number of the nozzles of the present invention is greater than the prior art and the nozzles on the inner layer are distributed uniformly in the form of concentric circles, so that the difficult problem in achieving the request for the uniformity to a greater size of deposited film and the problem of needing high performance device by the limited number of the nozzles with the increasing wafer size or the decreasing semiconductor device size can be solved, and can save the time and the costs of installing and adjusting the nozzles seriatim.


REFERENCES:
patent: 5439524 (1995-08-01), Cain et al.
patent: 5795429 (1998-08-01), Ishii et al.
patent: 6006694 (1999-12-01), DeOrnellas et al.
patent: 6089183 (2000-07-01), Imai et al.
patent: 6132552 (2000-10-01), Donohoe et al.
patent: 6162323 (2000-12-01), Koshimizu
patent: 6263829 (2001-07-01), Schneider et al.
patent: 9-223672 (1997-08-01), None

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