Electricity: electrical systems and devices – Electrostatic capacitors – Fixed capacitor
Patent
1983-08-25
1985-11-12
Pellinen, A. D.
Electricity: electrical systems and devices
Electrostatic capacitors
Fixed capacitor
339 17M, 339 75MP, 361400, H05K 114
Patent
active
045531927
ABSTRACT:
An integrated circuit module to printed circuit board interconnection system wherein the board has circuit pads to which spring contacts have one of their ends soldered to the pads. The module has circuit pads on one surface thereof and a pivotal connection is provided for loading the module onto the circuit board whereby the opposite ends of the spring contacts engage the circuit pads on the module with a wiping action and are retained in engagement therewith.
REFERENCES:
patent: 2065611 (1934-04-01), Pulleyblank
patent: 3172719 (1965-03-01), Paholek et al.
patent: 3391383 (1968-07-01), Antes
patent: 3395377 (1968-07-01), Straus
patent: 3701071 (1972-10-01), Landman
patent: 3753211 (1973-08-01), Pauza et al.
patent: 3771109 (1973-11-01), Bruckner et al.
patent: 3842189 (1974-10-01), Southgate
patent: 3877064 (1975-04-01), Scheingold et al.
patent: 3940786 (1976-02-01), Scheingold et al.
patent: 3982159 (1976-09-01), Dennis et al.
patent: 4052118 (1977-08-01), Scheingold et al.
patent: 4220383 (1980-09-01), Scheingold et al.
patent: 4278311 (1981-07-01), Scheingold et al.
patent: 4354720 (1982-10-01), Bakermans
patent: 4381131 (1983-04-01), Demnianiuk
IBM Technical Disclosure Bulletin, vol. 18, No. 3, Aug. 1975, p. 642, Full Semiconductor Wafer Package, R. H. A. Watson.
"Full Semiconductor Wafer Package", R. H. A. Watson, IBM Technical Disclosure Bulletin, vol. 18, No. 3, Aug. 1975, p. 642.
"High-Density Printed Circuit Connector, R. W. Callaway et al, IBM Technical Disclosure Bulletin, vol. 8, No. 3, Aug. 1965, pp. 351-352.
Babuka Robert
Piechota John L.
Poch Leonard J.
Galbi E. W.
Gugger Gerald R.
International Business Machines - Corporation
Meyers Steven J.
Pellinen A. D.
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