High density packaging technique for electronic systems

Details High density packaging technique for electronic systems High density packaging technique for electronic systems

1984-03-26

1986-12-23

Tolin, G. P.

Electricity: electrical systems and devices

Electrostatic capacitors

Fixed capacitor

357 82, 361382, H05K 720

Patent

active

046316361

ABSTRACT:
A high density packaging arrangement for electronics systems wherein a plurality of circuit board assemblies are provided with electronic components on one side and cooling tubes on the other side. The assemblies are arranged such that the cooling tubes mounted on one board cool the electronic components mounted on an adjacent board. Electronic contact elements are provided on the circuit board surfaces, to allow electrical interconnection of the electronic components mounted on adjacent boards.

REFERENCES:
patent: 3143592 (1964-08-01), August
patent: 3191100 (1965-06-01), Sorvillo
patent: 3249818 (1966-05-01), Hwang et al.
patent: 3348101 (1967-10-01), Klein et al.
patent: 3411041 (1968-11-01), Block
patent: 3475657 (1969-10-01), Knowles
patent: 3899720 (1975-08-01), Peterson
patent: 4019098 (1977-04-01), McCready et al.
patent: 4118756 (1978-10-01), Nelson et al.
patent: 4120019 (1978-10-01), Arii et al.
patent: 4143508 (1979-03-01), Ohno
patent: 4186422 (1980-07-01), Laermer
patent: 4190098 (1980-02-01), Hanlon
patent: 4327399 (1982-04-01), Sasaki et al.
patent: 4402135 (1983-09-01), Schweingruber et al.
Kerjilian et al, "Heat-Pipe Cooled Stacked Electronic Wafer Package", IBM Technical Disclosure Bulletin, vol. 18, No. 12, 5/76, pp. 3982-3983.

Affiliated with

Also associated with

Rating

High density packaging technique for electronic systems does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High density packaging technique for electronic systems, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High density packaging technique for electronic systems will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-175598