Static information storage and retrieval – Floating gate – Particular connection
Patent
1999-05-26
2000-06-27
Nguyen, Viet Q.
Static information storage and retrieval
Floating gate
Particular connection
36518501, 257315, 257316, G11C 1604
Patent
active
060814497
ABSTRACT:
A compact nonvolatile programmable memory cell. The memory cell has a floating gate (118), control gate (123), drain (108), and source regions (112). The memory cell is an electrically erasable programmable read only memory (EEPROM) cell or a Flash memory cell. Data may be stored the memory cell of the present invention for the required lifetime of the memory cell usage, and data is retained even when power is removed. The memory cell of the present invention has a substantially transverse or vertical channel (140), relative to a surface of a substrate. The memory may be used to create very high-density memory arrays.
REFERENCES:
patent: 4929988 (1990-05-01), Yoshikawa
patent: 5071782 (1991-12-01), Mori
patent: 5078498 (1992-01-01), Kadakia et al.
patent: 5135879 (1992-08-01), Richardson
patent: 5146426 (1992-09-01), Mukherjee et al.
patent: 5258634 (1993-11-01), Yang
patent: 5278438 (1994-01-01), Kim et al.
patent: 5281548 (1994-01-01), Prall
patent: 5315142 (1994-05-01), Acovic et al.
patent: 5330920 (1994-07-01), Soleimani et al.
patent: 5338953 (1994-08-01), Wake
patent: 5343063 (1994-08-01), Yuan et al.
patent: 5380672 (1995-01-01), Yuan et al.
patent: 5386132 (1995-01-01), Wong
patent: 5429970 (1995-07-01), Hong
patent: 5476801 (1995-12-01), Keshtbod
patent: 5479368 (1995-12-01), Keshtbod
patent: 5486714 (1996-01-01), Hong
patent: 5494838 (1996-02-01), Chang et al.
patent: 5506431 (1996-04-01), Thomas
patent: 5534456 (1996-07-01), Yuan et al.
patent: 5567635 (1996-10-01), Acovic et al.
patent: 5576567 (1996-11-01), Mori
patent: 5587340 (1996-12-01), Yamazaki
patent: 5675161 (1997-10-01), Thomas
patent: 5717635 (1998-02-01), Akatsu
patent: 5739567 (1998-04-01), Wong
patent: 5780341 (1998-07-01), Ogura
patent: 5828602 (1998-10-01), Wong
patent: 5835409 (1998-11-01), Lambertson
patent: 5929477 (1999-07-01), Burns, Jr. et al.
patent: 5943267 (1999-08-01), Sekariapuram et al.
Kim, et al., "A Novel Dual String NOR (DuSNOR) Memory Cell Technology Scalable to the 256 Mbit and 1Gbit Flash Memories," IEEE 0-7803-2700-4, IEDM 95, pp. 263-266.
Yamauchi, et al., "A New Cell Structure for Sub-quarter Micron High Density Flash Memory," IEEE 0-7803-2700-4, IEDM 95, pp. 267-269.
Aritome, et al., "A Novel Side-Wall Transfer-Transistor Cell (SWaTT Cell) for Multi-Level NAND EEPROMs", IEEE 0-7803-2700-4, IEDM 95, pp. 275-278.
Hanafi, et al., "Scalable Low Power Vertical Memory," IEEE 0-7803-2700-4, IEDM 95, pp. 657-660.
Madurawe Raminda U.
Sekariapuram Seshan
Altera Corporation
Nguyen Viet Q.
LandOfFree
High-density nonvolatile memory cell does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High-density nonvolatile memory cell, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High-density nonvolatile memory cell will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1789630