High density multichip package with interconnect structure and h

Details High density multichip package with interconnect structure and h High density multichip package with interconnect structure and h

1991-12-02

1993-01-26

Hille, Rolf

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

With provision for cooling the housing or its contents

257724, H01L 2334

Patent

active

051826321

ABSTRACT:
A package for multiple semiconductor integrated circuit chips uses an interconnect structure manufactured by semiconductor processing techniques to provide dense interconnections between chips and to input/output terminals. Chips are thermally connected to a Kovar or molybdenum heatsink. The interconnect structure is constructed by fabricating multiple layers of interconnect metallization on an optically flat glass (or other dielectric) surface patterned into lines and separated by smoothed glass dielectric. The metallization lines are interconnected by vias and lead to pads which are connected to chip pads and to exterior pins or wiring. An interconnect frame allows access to the chips and the interconnect structure to effect wire bonding of the chips to the metallization and provide sealable cavities for the chips. Elastomeric connectors extend through and are aligned by the frame to connect pads on the interconnect structure top to traces on a mother board to which the package is mounted. Chip bonding plates allow chips to be removed from the package and replaced when found defective.

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A. C. Adams et al., "Advanced Packaging for VLSI-Based Systems", Suss Report, Nov. 1987, pp. 2-3.
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