High-density mechanical memory and turing machine

Details High-density mechanical memory and turing machine High-density mechanical memory and turing machine

1999-09-30

2003-07-01

Hudspeth, David (Department: 2651)

Dynamic information storage or retrieval

With servo positioning of transducer assembly over track...

Optical servo system

C369S044140, C369S044150, C250S442110

Reexamination Certificate

active

06587408

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to non-volatile data storage devices, and more particularly to non-volatile data storage devices that exhibit ultra-high bit densities and very high data transfer rates. Additionally, the present invention relates to the cooperation between microelectromechanical (MEM) elements and nano-scale patterned surfaces.
BACKGROUND OF THE INVENTION
Currently, there are increasing demands for non-volatile data-storage devices with higher bit density, faster speed, lower power consumption, smaller size, and lower weight than presently available state-of-the-art devices. As a result, enormous research efforts have been devoted to the study and control of key factors that will lead to the necessary technical advances. CMR (colossal magneto-resistive) and GMR (giant magneto-resistive) effects have been exploited in thin-film ferromagnetic memory technologies, such as those found in computer hard drives. Unfortunately, implementations of this memory technology require large and bulky disk-drive mechanisms with complicated moving parts.
Proximal-probe techniques such as AFM (atomic force microscopy), MFM (magnetic force microscopy), SPM (scanning probe microscopy), thermomechanical writing, and many others have also been proposed for ultra-high density memory devices, but few of these efforts have yielded practical implementations.
Chip-based non-volatile devices such as ferroelectric memories, EPROMs (eraseable programmable read-only memories), and EEPROMs (electronically erasable programmable read-only memories) generally suffer from high manufacturing costs. Most critically, bit densities are severely limited by the size of the transistors used to write and read the digital information stored in each memory cell. However, chip-based memories enjoy the advantages of a complete write and read system contained in a single device with no moving parts.
Accordingly, there exists a distinct need for a non-volatile memory device that can combine the integral read/write capabilities and small size of chip-based memories with the ultra-high bit density capabilities of proximal-probe techniques.
DESCRIPTION OF THE INVENTION
Brief Summary of the Invention
In accordance with the present invention, a micron-scale, self-contained, ultra-high density and ultra-high speed storage device that is both re-writeable and non-volatile comprises two primary complementary components: a read/write head and a surface, containing bit-storage domains, that acts as the storage medium. The read/write element of the memory device may include a single or multiple heads mounted, for example, on microelectromechanic structures (MEMS) driven at mechanical resonance. Addressing of individual bits is accomplished by positioning the head element in close proximity to bit domains situated on the storage medium.
In one embodiment, individual bit domains are formed by nanoprinting. In a second embodiment, bit domains are formed by self-assembling metal-organic structures. In a third embodiment, a continuous electronically writeable film is created.
X-Y translation of a read/write head may be accomplished by vibrating motion in cross-mounted MEM structures. Alternatively, the read/write head may be fixed to a stationary support, with the memory medium attached to a MEM translation structure.
In another aspect of the invention, storage devices in accordance herewith are employed as universal Turing machines.


REFERENCES:
patent: 5557596 (1996-09-01), Gibson et al.
patent: 5587223 (1996-12-01), White
patent: 5796706 (1998-08-01), Shintani et al.
patent: 5801472 (1998-09-01), Wada et al.
patent: 5956216 (1999-09-01), Chou
patent: 6252226 (2001-06-01), Kley
patent: 6300622 (2001-10-01), Menzel
patent: 6309798 (2001-10-01), Reetz et al.
patent: 6310342 (2001-10-01), Braunstein et al.
patent: 6355491 (2002-03-01), Zhou et al.
G Lingjie, E Leobandung, and SY Chou, “A room-temperature silicon single-electron metal-oxide-semiconductor memory with nanoscale floating-gate and ul-tranarrow channel”, Appl. Phys. Lett., vol. 70, No. 7, Feb. 17, 1997, pp. 850-852.
L Zhuang, L Guo, and SY Chou, “Silicon single-electron quantum-dot transistor switch operating at room temperature”, Appl. Phys. Lett., vol. 72, No. 10, Mar. 9, 1998, pp 1205-1207.
G Lingjie, E Leobandung, L Zhuang, and SY Chou, “Fabrication and characteri-zation of room temperature silicon single electron memory”, AIP for American Vacuum Soc. Journal of Vacuum Science & Technology B, vol. 15, No. 6, Nov.-Dec. 1997, pp. 2840-2843.
K Yano, T Ishii, T Sane, T Mine, F Murai, T Kure, and K Seki, “A 128 Mb early prototype of gigascale single-electron memories”, 1998 IEEE International Solid-Sate Circuits Conference, Digest of Technical Papers, ISSCC, 1st Ed, IEEE, 1998, pp 244-245, 462.
T Ishii, K Yano, T Sano, T Mine, F Murai, and K Seki, “Verify: key to the stable single-electron-memory”, International Electron Devices Meeting 1997, IEDM Technical Digest, IEEE, pp 171-174.
K Yano, T Ishii, T Sano, T Mine, F Murai, and K Seki, “Single-electron-memory integrated circuit for giga-to-tera bit storage”, Silicon Nanoelectronics Workshop 1997, workshop absracts, Univ. Tokyo, 1997, pp 22-23.
A Nakajima, T Futatsugi, K Kosemura, T Fukano, and N Yokoyama, “Room temperature operation of Si single-electron memory with self-aligned floating dot gate”, International Electron Devices Meeting. Technical Digest (Cat. No.96CH35961). IEEE. 1996, pp. 952-954.
S Tiwari, JJ Welser, and F Rana, “Technology and power-speed trade-offs in quantum-dot and nano-crystal memory devices”, 1997 Symposium on VLSI Technology, Digest of Technical Papers (IEEE Cat. No. 97CH36114). Japan Soc. Appl. Phys. 1997, pp. 133-134.
P Bhyrappa, SR Wilson, KS Suslick, “Hydrogen-bonded porphyrinic solids: su-pramolecular networks of octahydroxy porphyrins”, Journal of the American Chemical Society, 119: (36) 8492-8502, Sep. 10, 1997.
H Zollinger, Color Chemistry Second, revised edition, 1991, Verlagsgesellschaft, Weinheim, pp. 353-360.
CB Murray, CR Kagan, and MG Bawendi, “Self-organization of CdSe nanocrys-tallites into three-dimensional quantum dot superlattices”, Science, vol. 270, Nov. 24, 1995, pp. 1335-1338.
BD Terris, HJ Mamin, and D Rugar, “Near-field optical data storage using a solid immersion lens”, Appl. Phys. Lett., vol. 65, No. 4, Jul. 25, 1994, pp 388-390.
G Markovich, DV Leff, S-W Chung, HM Soyez, B Dunn, and JR Heath, “Parallel fabrication and single-electron charging of devices based on ordered, two-dimensional phases of organically functionalized metal nanocrystals”, Appl. Phys. Lett., vol. 70 (23), Jun. 9, 1997, pp. 3107-3109.
MJ Yoo, TA Fulton, HF Hess, RL Willett, LN Dunkleberger, RJ Chichester, LN Pfeiffer, and KW West, “Scanning single-electron transistor microscopy: Imaging individual charges”, Science Magazine, vol. 276, Apr. 25, 1997, pp. 579-582.
RJ Schoelkopf, P Wahlgren, AA Kozhevnikov, “The radio-frequency single-electron transistor (RF-SET): A fast and ultrasensitive electrometer”, Science Magazine, vol. 280, May 22, 1998, pp. 1238-1242.
K Shum, J. Zhou, W Zhang, L Zeng, and MC Tamargo, “A concept for nonvola-tile memories”, Appl. Phys. Lett., vol. 71, No. 17 Oct. 27, 1997, pp 2487-2489.
SC Minne, G Yaralioglu, ST Manalis, JD Adams, J Zesch, A Atalar, and CF Quate, “Automated parallel high-speed atomic force microscopy”, Appl. Phys. Lett., vol. 72, No. 18, May 4, 1998, pp. 2340-2342.
ES Snow, PM Campbell, RW Rendell, FA Buot, D Park, DRK Marrian, and R Magno, “A metal/oxide tunneling transistor”, Appl. Phys. Lett., vol. 72, No. 23, Jun. 8, 1998, pp. 3071-3073.
BD Terris and RC Barrett, “Data Sorage in NOS: Lifetime and carrier-to-noise measurements”, IEEE Transactions on Electron Devices, vol. 42, No. 5, May 1995, pp. 944-949.
K Matsumoto, M Ishii, K Segawa, Y Oka, BJ Vartanian, and JS Harris, “Room temperature operation of a single electron transistor made by the scanning tun-neling microscope nanooxidation process for the TiOx/Ti system”, Appl. Phys. Lett., vol. 68, No. 1 Jan. 1, 1996, pp. 34-36.
JH Mamin, BD Terris, LS Fan, S Hoen, RC Barr

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