Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Reexamination Certificate
1998-09-22
2001-05-08
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
C438S617000, C257S666000, C257S668000
Reexamination Certificate
active
06228683
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates generally to semiconductor integrated circuit packages and more particularly, it relates to an improved high density leaded ball-grid array (BGA) package of a simple construction which includes a leadframe mounted on a top side of a laminated substrate and solder balls attached to the bottom side thereof so as to accommodate a higher lead-count.
In recent years, there has existed a high level of interest in the area of ball grid array (BGA) package and assembly technology. The reason for this is because the package and interconnection industry has departed from the use of pins as connectors for electronic packaging due to their high cost of fabrication, the high failure rate of connections, and the limitations on the density of input/output pins. As a result, solder balls have been used which are superior to pins in the above areas as well as being surface mountable.
As is generally known heretofore, ball-grid array (BGA) semiconductor packages typically include a substrate such as a printed circuit board and a semiconductor chip or die mounted on the top side of the substrate. A conductive trace pattern is also formed on the top side of the printed circuit board. The die generally contains a number of electrical circuits therein and includes a plurality of bonding pads disposed on its top surface adjacent its peripheral edges. Very thin gold bonding-wires have their one ends bonded to the corresponding pads on the integrated-circuit die and their other ends bonded to the corresponding ends of the conductive trace pattern on the top side of the printed circuit board. A second conductor trace pattern is formed on the bottom side of the printed circuit board and is electrically connected to the first conductive trace pattern on the top side thereof through respective plated-through holes. Each of the ends in the second conductive trace pattern terminates with a contact pad where a conductive solder ball is attached thereto. Generally, the semiconductor die and the bonding-wires are encapsulated in an encapsulating material such as a plastic molding compound.
The consumers of the BGA packages in the electronic and computer industries have been demanding higher and higher die densities to support higher lead counts within the same package footprint area. Further, the consumers are likewise demanding improved conductor routing to the package so as to produce enhanced electrical performance and to reduce costs. While some package designers have attempted to solve these problems by utilizing multi-layer substrates, this use of increased number of substrates is generally more expensive and has thus increased manufacturing costs.
Accordingly, there exists a need for an improved high density leaded BGA package which can accommodate the electronic and computer industry's demand for a smaller pitch distance between the conductor solder balls in order to provide higher lead counts within the same conventional package size. It would also be expedient to provide an improved high density leaded BGA package which is of a simple construction and is relatively low in cost to manufacture and assemble, but yet still has a high electrical performance.
SUMMARY OF THE INVENTION
Accordingly, it is a general object of the present invention to provide an improved high density leaded BGA packages which is relatively simple in its construction and is easy to manufacture and assemble.
It is an object of the present invention to provide an improved high density leaded BGA package which can accommodate higher lead counts within the same conventional package size.
It is another object of the present invention to provide an improved high density leaded BGA package which has a high electrical performance.
It is still another object of the present invention to provide a high density leaded BGA package which includes a leadframe mounted on the top side of a laminated substrate and solder balls attached to the bottom side thereof so as to accommodate a higher lead count.
It is yet still another object of the present invention to provide a method for fabricating an improved high density leaded BGA package of a simple design, thereby reducing manufacturing costs.
In accordance with these aims and objectives, the present invention is concerned with the provision of a high density leaded ball-grid array package for packaging an integrated-circuit die which includes a non-conductive layer having top and bottom sides. A first conductive trace pattern is laminated on the top side of the non-conductive layer. A second conductive trace pattern is laminated on the bottom side of the non-conductive layer. The non-conductive layer is sandwiched between the first and second conductive trace patterns so as to form a laminated substrate. A leadframe is provided which has a plurality of conductive leads and a centrally-located open portion. The plurality of conductive leads have their innermost ends defining bonding fingers. The leadframe is directly attached onto the first conductive trace pattern of the laminated substrate by a non-conductive adhesive so that the open portion thereof overlies a central region of the laminated substrate.
An integrated-circuit die is mounted in the central region of the laminated substrate. The bonding fingers are disposed peripherally surrounding the integrated-circuit die. Bonding wires are interconnected between bonding pads formed on the integrated-circuit die and the bonding fingers on the leadframe. A plastic material is molded over the top surface of the die, bonding fingers and bonding wires. A solder mask is disposed over the second conductive trace pattern so as to form selective solderable areas. Solder balls are attached to the selective solderable areas.
REFERENCES:
patent: 5442230 (1995-08-01), Chillara
patent: 5646831 (1997-07-01), Manteghi
patent: 5672548 (1997-09-01), Culnane
patent: 5689091 (1997-11-01), Hamzehdoost
patent: 5705851 (1998-01-01), Mostafazadeh
patent: 5729051 (1998-03-01), Nakamura
“Electronic Packaging, Microelectronics, and Interconnection Dictionary,” Charles A. Harper et al., McGraw-Hill, pp. 70, 126-27, 169, 181, 1993.*
“Soldering in Electronics Assembly,” Mike Judd, et al., Newnes, pp. 51-53, 1999.
Berezny Nema
Bowers Charles
King Patrick T.
Philips Electronics North America Corp
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