Fishing – trapping – and vermin destroying
Patent
1995-01-09
1996-10-15
Wilczewski, Mary
Fishing, trapping, and vermin destroying
437 40, 437 41, H01L 21265
Patent
active
055653685
ABSTRACT:
In a MOS type semiconductor device, a source region, a channel region and a drain region of a MOS type device are arranged on the same plane, while a gate electrode is also arranged on the same plane adjacent to the channel region. Another set of a source region, a channel region and a drain region may also be arranged on the same plane and the latter MOS device Is arranged to the gate electrode. This the of device may be constructed as a CMOS type device.
In another type of semiconductor device, the above-mentioned type plane arrangement of the source, channel and drain regions are layered via an insulator layer, while a gate electrode is provided vertically so as to be adjacent to the two channel regions.
REFERENCES:
patent: 4089022 (1978-05-01), Asai et al.
patent: 4818334 (1989-04-01), Shwartzman et al.
patent: 5096845 (1992-03-01), Inoue
patent: 5420048 (1995-05-01), Kondo
Dutton Brian K.
Matsushita Electric - Industrial Co., Ltd.
Wilczewski Mary
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