Electricity: electrical systems and devices – Safety and protection of systems and devices – With specific current responsive fault sensor
Patent
1984-05-30
1986-12-16
Davie, James W.
Electricity: electrical systems and devices
Safety and protection of systems and devices
With specific current responsive fault sensor
357 74, 357 80, 361401, 174 52FP, H01L 2312, H01L 2318, H01L 2340
Patent
active
046300961
ABSTRACT:
An electronic module having a high density of silicon IC chips is provided by mounting the chips in tapered through-holes in a silicon substrate, filling the edge gaps between the chips and the substrate with a glass so that the chips, the filler glass, and the substrate have a smooth upper surface adapted to receive monolithic interconnections formed by planar metallization methods. The resulting assembly is enclosed in a housing also formed substantially from silicon, which contains electrically isolated pins for contacting the input-output electrodes of the assembly. Preferential etching is used to form the through-holes in the substrate as well as various alignment means on the substrate and other parts of the housing so that they are self-aligning during assembly. Improved performance, reliability, and low cost is obtained.
REFERENCES:
patent: 3365620 (1968-01-01), Butler et al.
patent: 3698082 (1972-10-01), Hylin et al.
patent: 3757175 (1973-09-01), Kim et al.
patent: 3777221 (1973-12-01), Tatusko et al.
patent: 3936866 (1976-02-01), Grossman et al.
patent: 3947957 (1976-04-01), Luttner
patent: 4017886 (1977-04-01), Tomono et al.
patent: 4189825 (1980-02-01), Robillard et al.
patent: 4221047 (1980-09-01), Narken et al.
patent: 4256532 (1981-03-01), Magdo et al.
patent: 4259684 (1981-03-01), Dean et al.
patent: 4264917 (1981-04-01), Ugon
patent: 4285002 (1981-08-01), Campbell
patent: 4294009 (1981-10-01), Quintin et al.
patent: 4361720 (1982-11-01), Resneau et al.
patent: 4396936 (1983-08-01), McIver et al.
Laff, R. A., "Interconnection of Arrays", IBM Technical Disclosure Bulletin, vol. 12, No. 10, (Mar. 1970), pp. 1556-1558.
Ahearn, W. E. et al., "Silicon Heat Sink Method to Control Integrated Circuit Chip Operating Temperatures," IBM Technical Disclosure Bulletin, vol. 21, No. 8, pp. 3378-3380, (1/1979).
"Microelectronic Packaging," A. Blodgett, Scientific American, Jul. '83, p. 86.
"Silicon Micromechanical Devices," J. B. Angell et al., Scientific American, Apr. '83, p. 44.
"Alternatives in VLSI Packaging," John Balde et al., VLSI Design, Dec. '83, p. 23.
"A Multi-Layer Cermanic, Multi-Chip Module," A. Blodgett, Proceedings 30 in Electronic Components Conference, Apr. 28-30, 1980, p. 283.
"Thermal Conduction Module: A High Performance Multilayer Cermanic Package," A. Blodgett et al., IBM J. Res. Dev., vol. 26, No. 1, Jan. '82, p. 30.
"Thermal-Conduction Module Cradles and Cools Up to 133 LSI Chips," J. Barbour et al., Electronics, Jun. 16, 1982, p. 143.
Drye James E.
Schroeder Jack A.
Winchell, II Vern H.
Davie James W.
Economou Vangelis
Handy Robert M.
Motorola Inc.
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