High density floating gate EPROM programmable by charge storage

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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357 23, 357 41, 357 54, 357 59, 365185, H03K 500, G11C 1140, H01L 2978, H01L 2702

Patent

active

042824460

ABSTRACT:
A floating gate type electrically programmable memory device is made by an N-channel double-level polysilicon self-aligned process which results in a very dense array. The programming inefficiency caused by inherent resistance of elongated diffused regions used as column lines is overcome by a capacitive discharge programming method. Distributed capacitance of the column lines is charged to the programming voltage before the selected row line is brought to a high voltage, producing a pulse of current through the cell. A series of these programming pulses may be used.

REFERENCES:
patent: 4112509 (1978-09-01), Wall
patent: 4151021 (1979-04-01), McElroy
patent: 4184207 (1980-01-01), McElroy

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