High density electronic circuit modules

Details High density electronic circuit modules High density electronic circuit modules

1999-02-12

2000-11-07

Niebling, John F.

Semiconductor device manufacturing: process

Making device or circuit emissive of nonelectrical signal

Including integrally formed optical element

438197, 438229, 438257, H10L 2100

Patent

active

061435821

ABSTRACT:
The invention relates to device processing, packaging and interconnects that will yield integrated electronic circuitry of higher density and complexity than can be obtained by using conventional multi-chip modules. Processes include the formation of complex multi-function circuitry on common module substrates using circuit tiles of silicon thin-films which are transferred, interconnected and packaged. Circuit modules using integrated transfer/interconnect processes compatible with extremely high density and complexity provide large-area active-matrix displays with on-board drivers and logic in a complete glass-based modules. Other applications are contemplated, such as, displays, microprocessor and memory devices, and communication circuits with optical input and output.

REFERENCES:
patent: 4575854 (1986-03-01), Martin
patent: 4612083 (1986-09-01), Yasumoto
patent: 4727047 (1988-02-01), Bozler et al.
patent: 4769680 (1988-09-01), Resor, III et al.
patent: 4774205 (1988-09-01), Choi et al.
patent: 4808983 (1989-02-01), Benjamin et al.
patent: 4837182 (1989-06-01), Bozler et al.
patent: 4838654 (1989-06-01), Hamaguchi et al.
patent: 4846931 (1989-07-01), Gmitter et al.
patent: 4855255 (1989-08-01), Goodhue
patent: 4863877 (1989-09-01), Fan et al.
patent: 4870475 (1989-09-01), Endo et al.
patent: 4883561 (1989-11-01), Gmitter et al.
patent: 4935792 (1990-06-01), Tanaka et al.
patent: 4961629 (1990-10-01), Kato
patent: 4965565 (1990-10-01), Noguchi
patent: 4979002 (1990-12-01), Pankove
patent: 5045895 (1991-09-01), Yoshida et al.
patent: 5073806 (1991-12-01), Idei
patent: 5084905 (1992-01-01), Sasaki et al.
patent: 5087585 (1992-02-01), Hayashi
patent: 5117298 (1992-05-01), Hirai
patent: 5166816 (1992-11-01), Kaneko et al.
patent: 5184235 (1993-02-01), Sukegawa
patent: 5187379 (1993-02-01), Noda
patent: 5191453 (1993-03-01), Okumura
patent: 5206749 (1993-04-01), Zavracky et al.
patent: 5233211 (1993-08-01), Hayashi et al.
patent: 5245452 (1993-09-01), Nakamura et al.
patent: 5258325 (1993-11-01), Spitzer et al.
patent: 5300788 (1994-04-01), Fan et al.
patent: 5317433 (1994-05-01), Miyawaki et al.
patent: 5347154 (1994-09-01), Takahashi et al.
patent: 5362671 (1994-11-01), Zavracky et al.
patent: 5377031 (1994-12-01), Vu et al.
patent: 5499124 (1996-03-01), Vu et al.
patent: 5702963 (1997-12-01), Vu et al.
patent: 5757445 (1998-05-01), Vu et al.
Milnes, A.G., "Semiconductor Heterojunction Topics: Introduction and Overview," Solid-State Electronics, 29(2):99-121, (1986).
Akiyama, M. et al., "Growth of GaAs on Si and Its Application to FETs and LEDs," Nat. Res. Soc. Proc., 67:53-64, (1986).
Turner, G. et al., "High-Speed Photoconductive Detectors Fabricated in Heteroepitaxial GaAs Layers," Mat. Res. Soc. Symp. Proc., 67:181-188 (1986).
McDaniel, D.L. et al., "Vertical Cavity Surface-Emitting Semiconductor Laser with CW Injection Laser Pumping," IEEE Photonics Techology Letters,2:156-158 (1990).
Weber, J.P. et al., "Effects of Layer Thickness Variations on Vertical Cavity Surface-Emitting DBR Semiconductor Lasers," IEEE Photonics Technology Letters, 2:162-164 (1990).
"3-D Chip-On-Chip Stacking," Semiconductor International, p. 12 (Dec. 1991).
McClelland et al., "A Technique for Producing Epitaxial Films on Reusable Substrates", Appl. Phys. Lett., 37: 560-562 (1980).
Yablonovitch et al., "Extreme Selectivity in the Lift-Off of Epitaxial GaAs Films," Appl. Phys. Lett, 51: 2222-2224 (1987).
Fan et al., "Lateral Epitaxy by Seeded Solidification for Growth of Crystal Si Films on Insulators," Appl. Phys. Lett., 38: 365-367 (1981).
Allen et al., "Characterization of Isolated Silicon Epitaxy Material," SPIE vol. 945--Advanced Processing of Semiconductor Devices II, 945: 126-130 (1988).
Conference Record of the 1991 International Display Research Conference, (Oct. 15-17, 1991) IEEE.
Y. Hayashi et al., "A New Three Dimensional IC Fabrication Technology, Stacking Thin Film Dual-CMOS Layers," IEEE IEDM, pp. 657-660 (1991).
U. Konig, "Dreidimensionale Integration," Electroniker, (10):79-82 (Oct. 1989). (English translation only).
E. Hofmeister, "Mikroelektronik 2000," Siemans Components, 27(2):54-58 (Mar./Apr. 1989). (English Translation Only).

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