Semiconductor device manufacturing: process – Thinning or removal of substrate
Patent
1996-09-18
1999-06-29
Niebling, John F.
Semiconductor device manufacturing: process
Thinning or removal of substrate
438117, 174267, 361764, H01L 21324, H01L 21477, H01L 2126, H01L 2142
Patent
active
059181532
ABSTRACT:
High density circuits with posts that protrude beyond one surface of a substrate to provide easy mounting of devices such as integrated circuits. The posts also provide stress relief to accommodate differential thermal expansion. The process allows high interconnect density with fewer alignment restrictions and less wasted circuit area than previous processes. The resulting substrates can be test platforms for die testing and for multi-chip module substrate testing. The test platform can contain active components and emulate realistic operational conditions, replacing shorts/opens net testing.
REFERENCES:
patent: 5077598 (1991-12-01), Bartelink
patent: 5147208 (1992-09-01), Bachler
patent: 5189505 (1993-02-01), Bartelink
patent: 5334804 (1994-08-01), Love et al.
patent: 5355283 (1994-10-01), Marrs et al.
patent: 5434452 (1995-07-01), Higgins, III
patent: 5487999 (1996-01-01), Farnworth
patent: 5618752 (1997-04-01), Gaul
patent: 5646067 (1997-07-01), Gaul
patent: 5747358 (1998-05-01), Gorrell et al.
patent: 5786270 (1998-07-01), Gorrell et al.
Grafe V. Gerald
Murphy John
Niebling John F.
Sandia Corporation
LandOfFree
High density electronic circuit and process for making does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High density electronic circuit and process for making, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High density electronic circuit and process for making will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-1386587