High density EEPROM for solid state file

Static information storage and retrieval – Floating gate – Particular connection

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36518511, 36518512, 257314, 257315, 257319, H07L 2968

Patent

active

057176353

ABSTRACT:
An EEPROM of NOR-type architecture is formed at high integration density and allows selective programming without selective production of hot electron currents in storage transistor channels. common transistor channel conductors are formed as n-wells running parallel to bit lines having a width of minimum lithographic feature size and separated by shallow trench isolation structures. Connections from bit lines and the n-wells to respective transistors is formed by sub-lithographic metal plugs formed in a self-aligned manner to sidewalls of a layered structure including floating gates and a control gate/word line conductor. Thus a cell size only slightly greater than four times the minimum lithographic feature size can be produced. Provision of a transistor connecting a bit line and an associated n-well unconditionally prevents hot electron current concentration in the gate oxide to increase durability during both programming and flash erasure to either logical state. Programming in combination with erasure to either logical state further doubles memory cell durability.

REFERENCES:
patent: 4375087 (1983-02-01), Wanlass
patent: 4379343 (1983-04-01), Moyer
patent: 4398338 (1983-08-01), Tickle et al.
patent: 4435790 (1984-03-01), Tickle et al.
patent: 4875188 (1989-10-01), Jungroth
patent: 5243559 (1993-09-01), Murai
patent: 5295107 (1994-03-01), Okazawa et al.
patent: 5313086 (1994-05-01), Jinbo
patent: 5361235 (1994-11-01), Kodama
patent: 5379253 (1995-01-01), Bergemont
patent: 5523969 (1996-06-01), Okazawa
patent: 5554867 (1996-09-01), Ajika et al.
"An Asymmetrical Offset Source/Drain Structure for Virtual Ground Array Flash Memory with Dinor Operation"M. Ohi et al.; LSI Laboratory, Mitsubishi Electric Corp.; Japan; pp. 57-58.

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