High density dynamic memory cell

Details High density dynamic memory cell High density dynamic memory cell

1980-03-21

1983-03-15

Fears, Terrell W.

Static information storage and retrieval

Hardware for storage elements

Shields

365182, 357 59, 357 84, G11C 1140

Patent

active

043769837

ABSTRACT:
A dynamic read/write memory cell of the one transistor N-channel silicon gate type is made by a triple-level polysilicon process which allows the bit lines to be formed by metal strips which have low resistance and which can cover the storage capacitors for alpha particle protection. Metal-to-silicon contacts are made through an intervening polysilicon segment which allows the underlying N+ silicon region to be much smaller than in prior cells. The polysilicon segment also prevents the occurance of problems with spiking of metal through shallow implanted N+ regions.

REFERENCES:
patent: 3479655 (1969-11-01), Quinn
patent: 3482152 (1969-12-01), Iersel
patent: 4025907 (1977-05-01), Karp et al.
patent: 4126900 (1978-11-01), Koomen et al.
IBM Tech. Dis. Bul., vol. 14, No. 10, Mar. 1972, "Stacked High Density Multichip Module", by Jarvella, pp. 2896-2897.

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