High density decoder

Static information storage and retrieval – Addressing – Particular decoder or driver circuit

Patent

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Details

36523001, 365239, G11C 800

Patent

active

057243026

ABSTRACT:
A decoding circuit for two sequential addresses including a function gate which shares both P type input transistor devices between input terminals and uses predecoders to remove P type devices from a central portion of available die space, and N type transistor devices by utilizing a pass gate device to join output terminals for the two sequential addresses when an address is not selected.

REFERENCES:
patent: 4886987 (1989-12-01), Usami
patent: 4953133 (1990-08-01), Kashimura
patent: 5109353 (1992-04-01), Sample et al.
patent: 5311479 (1994-05-01), Harada
patent: 5461593 (1995-10-01), Kim

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