High density data storage using stacked wafers

Details High density data storage using stacked wafers High density data storage using stacked wafers

1992-09-21

1993-07-20

James, Andrew J.

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

By pressure alone

257686, 257774, H01L 2316

Patent

active

052296474

ABSTRACT:
A solid-state memory unit is constructed using stacked wafers containing a large number of memory units in each wafer. Vertical connections between wafers are created using bumps at the contact points and metal in through-holes aligned with the bumps. The bumps on one wafer make contact with metal pads on a mating wafer. Mechanical bonding between the bumps and mating metal pads on another wafer is preferably avoided so that fractures due to thermal expansion differentials will be prevented. Serial addressing and data access is employed for the memory units to minimize the number of connections needed. Also, the metal pads, through-holes and bumps are formed at corners of the die and thus shared with adjacent units whenever possible, further reducing the number of vertical connections.

REFERENCES:
patent: 3239719 (1966-03-01), Shower
patent: 3813773 (1974-06-01), Parks
patent: 4761681 (1988-08-01), Reid
patent: 4807021 (1989-02-01), Okumura
patent: 4897708 (1990-01-01), Clements
patent: 4954875 (1990-09-01), Clements
patent: 4984358 (1991-01-01), Nelson
patent: 5089880 (1992-02-01), Meyer et al.

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