High-definition liquid crystal display including sub scan...

Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix

Reexamination Certificate

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Details

C345S093000

Reexamination Certificate

active

06727875

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to a liquid crystal display apparatus, and, more particularly, to a liquid crystal display apparatus of the high resolution active matrix type.
Since an active matrix liquid crystal display apparatus can display images with a high contrast, and also has a low profile and is light in weight, it has been widely used for portable note-type computers and portable image display apparatuses. For example, this type of display apparatus is reported on pages 879 to 881 in the SAID International Symposium Digest of Technical Papers. A detailed description of the active matrix drive method and liquid display modules is found in “Liquid Display Technologies”, Sangyo Tosho Publishing Co., authored and edited by Shouichi Matsumoto.
In order to provide an understanding of the difference between conventional devices and the present invention, a conventional display apparatus, as shown in
FIG. 17
, and the liquid crystal display apparatus of the present invention, as shown in
FIG. 1
, will be outlined below.
FIG. 1
is a schematic diagram of the present invention, in which the display areas
6
,
7
are composed of a plurality of pixels
1
, each arranged at a respective intersection between the main scan wiring lines
12
and the signal wiring lines
11
, which are arranged in a matrix wiring configuration, and sub scan wiring lines
19
are arranged in the same direction as the signal wiring lines
11
. In order to drive those wiring lines, a main scan circuit
10
, a sub scan circuit
15
, a signal circuit
9
and a control circuit
13
for controlling the control signals are provided, along with an opposed electrode
17
formed on the opposite substrate which faces the pixels and supports the liquid crystal. The electric power for driving this display apparatus, the synchronous signals and the display data are applied thorough a flexible wiring strip
14
.
For driving an individual pixel, a couple of TFT's are connected between the drain wiring and the display electrode
2
and in series with the main circuit of the TFT, and the individual gate electrodes of the TFT's are connected to the main scan wiring lines and the sub scan wiring lines. A single main scan wiring line
12
is assigned to every two pixels of a column, and it is connected in common to the gate terminals of dual TFT's
3
for the main scan wiring. TFT's
4
for the sub scan wiring are arranged in a repetitive sequence of nch, pch, nch and pch in every column, and their gate terminals are connected to identical sub scan wiring lines in the row direction, and those lines are connected to one another outside the matrix, so that the TFT's are driven all together by the sub scan circuit
15
. In addition, a retention capacitance
5
is arranged at the display electrode, and one terminal of the retention capacitance is connected to the display electrode, and its other terminal is connected to the terminal of an adjacent retention capacitance and is connected to the common electrode power supply circuit located outside the matrix.
In order to drive this matrix using a linear serial method, the following drive scheme is employed. At first, in order to select the pixels for every column, every two columns of TFT's
3
for the main scan wiring are turned on and two columns of pixels are selected by applying the main scan pulse to the main scan wiring; and then, the TFT for the sub scan wiring among the selected pixels in two columns is alternately turned on by setting the voltage of the sub scan wiring to logic level H for almost a half period of the main scan pulse and by setting logic level L for the remaining half period. The pixels arranged in a single column in which both the TFT
3
for the main scan wiring and the TFT
4
for the sub scan wiring are simultaneously turned on can be selected.
In the display apparatus with a conventional structure, as shown in
FIG. 17
, the pixel TFT
102
is arranged at the intersection of the scan wiring line
100
and the signal wiring line
101
, with the main circuit of the TFT being connected between the signal wiring line
101
and the display electrode
103
and the scan wiring line
100
being connected to the gate electrode of the TFT. In this case, the number of scan wiring lines is required to be equal to the number of pixels arranged in the column direction. As the selection pulse is applied sequentially to the scan wiring line from the first column, the pixel of the first column is selected by turning on the pixel TFT of the first column and the liquid crystal capacitance composed of the display electrode
104
and the opposed electrode
105
is charged by the signal voltage of the signal wiring line
101
; and then, the pixel TFT of the first column is turned off, and next, the second and remaining columns are repetitively driven so as to be selected, until all the scan wiring lines are scanned, and the display operation is completed by applying a designated signal voltage to all the pixels.
In an attempt to provide a panel that is configured with a higher resolution in the conventional technology, the selection time, that is, the gate time for a single pixel is reduced because the number of the scan wiring lines increases. Thus, a speeding up of the response in the scan wiring is required. However, as the number of pixels for a single column inevitably increases for attaining the higher resolution, the wiring time constant represented by the product of the wiring resistance and the wiring capacitance increases and the transition response time at the terminal of the wiring increases. In attempting to speed up the transient response, though there may be an alternative way in which the wiring resistance is made smaller, a modification of the process is required, which is not feasible realistically. In addition, though there may be an alternative way in which the wiring width is made larger in order to reduce the wiring resistance, this results in a decrease in the numerical aperture of the pixel part and an increase in the electric power consumption of the panel itself.
The present invention is characterized in that, by combining the main scan pulse generated by the main scan wiring lines arranged in the row direction and the sub scan pulse generated by the sub scan wiring lines arranged in the column direction along the signal wiring lines, a pixel line is selected by a TFT circuit formed at the pixel part. By applying a pulse having a time width twice as long as the selection time for the individual column to the main scan wiring lines having a long wiring delay time, and by applying a high-speed sub scan pulse to the sub scan wiring lines having a wiring length in the row direction, a single row can be selected. With this configuration, the pulse width of the wiring selection pulse can be extended to be twice as long as that in the prior art even in a panel with high definition, and an excellent display image can be obtained even if the wiring response time may increase.
In accordance with the present invention, if the number of sub scan wiring lines is defined to be “a”, the selection time width of the main scan wiring can be extended “2a” times, and the main scan wiring pulse width can be extended four times, eight times or sixteen times by making the number of the sub scan wiring lines two, three or four, which leads to an advantageous aspect for making it easier to form a high-definition panel.
In addition, according to the present invention, the extension of the main scan wiring pulse width may contribute advantageously to the reduction of the frequency and energy of the unnecessary radiation generated from the main scan wiring.
And, furthermore, by applying this drive method to a reflection liquid crystal display apparatus, a high-definition and low electric power consumption panel can be advantageously provided.
As for the method in which plural TFT's for pixel selection are formed in a pixel, there is a case as disclosed in Japanese Patent Application Laid-Open No. 9-329807 (

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