Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame
Reexamination Certificate
1999-06-07
2001-07-03
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With structure for mounting semiconductor chip to lead frame
C257S675000, C257S727000, C257S719000, C257S718000, C257S726000, C257S782000, C257S730000, C257S735000, C361S767000, C361S769000
Reexamination Certificate
active
06255722
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to discrete semiconductor device packages or housings and more specifically relates to a semiconductor device housing which permits an increased area die in a lead frame of given area and permits improved clamping of the device during molding.
Semiconductor device packages or housings are well known. One such device is known by the industry style number “TO-247”. Such devices commonly have 3 output lead conductors extending through the package surface which are connected to a semiconductor die, which may be power MOSFET or IGBT die or the like. The bottom surface of the lead frame paddle which receives the die is exposed for pressure contact by bolting it through an opening in the package to a heat sink.
The present invention permits the use of a larger die in a type TO-247 package of given size, permits its improved clamping to a heat sink, and provides an increased creepage distance between leads.
SUMMARY OF THE INVENTION
In accordance with the present invention, a TO-247 style package is modified to remove the mounting bolt opening from the lead frame and to mount the device to a heat sink by a novel spring clamp (clip) arrangement. This permits an increase in the area of the semiconductor die which can be mounted within the device. A notch is also provided in the housing plastic between the leads exiting the housing to increase the creepage distance between the leads. A novel countersunk set of corner openings in the housing expose the lead frame corners to permit corner clamping during molding and improve the hermeticity of the package, i.e., the extent to which a hermetic seal is made with the lead frame around the die and wire bonds.
The use of the novel clip mounting has the following advantages:
1. Quick and simple operation at low cost.
2. Up to 2.5 kilograms of spring pressure can be applied to the center of the package.
3. The package is mounted with a consistent thermal resistance to a heat sink.
4. There is a low risk of damage to the part during mounting to a heat sink.
5. The structure is applicable to mass production manufacture.
The maximum die area usable with the present invention is 10 mm×14 mm. This can be provided by a single MOSFET die such as the HEX 7.3 size die made by the International Rectifier Corporation, with a power density of 300 w. Alternatively, a MOSFET of size HEX6 and a fast recovery diode (FRED 51) also made by International Rectifier Corporation, can be copacked in the same package in the manner of the device type IRGPSH60UD device of International Rectifier Corporation.
The novel package of the invention can receive a die normally associated with the TO-264 package. A die used in a TO-264 package is typically larger than a die used in the TO-247 package. However, the TO-247 package of the present invention has a smaller footprint, a higher current rating and lower cost than the larger TO-264 package. By comparison to a typical TO-247 package, the package of the invention has the same footprint but a larger die and higher current rating. Note that the output conductors or legs of the present invention have an increased cross-sectional area to accommodate the higher package current.
The ratio of die area to package area is shown in the following table:
PACKAGE TYPE
DIE/PACKAGE RATIO
TO-264
17%
TO-220
16%
TO-247
19%
PACKAGE OF INVENTION
31%
As used in the above table, the package area refers to the total footprint area, including the legs, that the package would occupy if transversely mounted on a circuit board or heat sink. Thus, the package of the present invention can accommodate a die over 1.5 times the size of the die supported by a typical TO-247 package. In addition, the package of the present invention provides a more efficient use of the available lead frame real estate than do the typical TO-220, TO-247 and TO-264 packages.
The invention provides a semiconductor device package in which a lead frame has a large area paddle section and at least one leg extending therefrom, the lead frame being of substantially constant thickness, and the paddle section being continuous and free of openings therethrough. A semiconductor die is mounted to the paddle section of the lead frame, the semiconductor die occupies substantially all of the surface area of a side of the paddle section upon which said semiconductor die is mounted, and the full surface of the die and at least the side of the paddle section upon which the semiconductor die is mounted are covered by a common and uninterrupted mold housing, at least one leg protruding therefrom and the mold housing being free of openings therethrough.
The novel package of the invention also is less susceptible to moisture intrusion due to the placement of the molding clamp openings at the device corners, creating a longer moisture path into the package interior than if the molding clamp openings were kept on the lateral portions of the device. This is the case because the larger die accommodated in the inventive package is closer to the sides of the package than the corners.
Other features and advantages of the present invention will become apparent from the following description of the invention which refers to the accompanying drawings.
REFERENCES:
patent: 4503452 (1985-03-01), Yokozawa et al.
patent: 4803545 (1989-02-01), Birkle
patent: 5130888 (1992-07-01), Moore
patent: 5521429 (1996-05-01), Aono et al.
patent: 5530284 (1996-06-01), Bailey
patent: 6046501 (2000-04-01), Ishikawa et al.
Ewer Peter R.
Steers Mark
International Rectifier Corp.
Ostrolenk Faber Gerb & Soffen, LLP
Thai Luan
Thomas Tom
LandOfFree
High current capacity semiconductor device housing does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with High current capacity semiconductor device housing, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High current capacity semiconductor device housing will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2497098