High contrast alignment marker for integrated circuit fabricatio

Details High contrast alignment marker for integrated circuit fabricatio High contrast alignment marker for integrated circuit fabricatio

1981-07-30

1983-02-22

Lusignan, Michael R.

Radiation imagery chemistry: process, composition, or product th

Registration or layout process other than color proofing

430312, 430313, 430316, 156644, 156646, G03F 900, G03C 1100

Patent

active

043749151

ABSTRACT:
A wafer marker is described for aligning masks with the wafer. The marker comprises a depression in the wafer which is defined by sloped sides and a pitted bottom. The sloped sides and pitted bottom do not directly reflect light as does the surface of the surrounding silicon and thus the marker appears as a darker region. The bottom of the depression is pitted by exposing the anode during a silicon plasma etching step.

REFERENCES:
patent: 3171762 (1965-03-01), Rutz
patent: 3783044 (1974-01-01), Cheskis et al.
patent: 3787275 (1974-01-01), Grenma
patent: 3802940 (1974-04-01), Villers et al.
patent: 4106976 (1978-08-01), Chiou et al.
patent: 4233091 (1980-11-01), Kawabe
Brownlow, IBM Tech. Dis. Bul., vol. 21, No. 3, Aug. 1978.
Doo, IBM Tech. Dis. Bul., vol. 23, No. 7A, Dec. 1980.

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