Railways: surface track – Rail seats – Inverted channel rail
Reexamination Certificate
1999-05-28
2001-02-13
Chaudhuri, Olik (Department: 2814)
Railways: surface track
Rail seats
Inverted channel rail
C257S328000
Reexamination Certificate
active
06186408
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to discrete semiconductor devices and in particular to power semiconductor devices. More particularly, the present invention relates to power rectifiers including semiconductor diodes, Schottky diodes and synchronous rectifiers.
2. Background of the Invention
Power rectifiers have a variety of applications. For example, an important application of such rectifiers is in DC to DC voltage converters and power supplies for personal computers and other electronic devices and systems. In such applications, it is important to provide both a fast recovery time for the semiconductor rectifier and a low forward voltage drop across the rectifier (V
f
).
The most common rectifiers are semiconductor diodes, i.e., diodes which employ a PN semiconductor diode junction for rectification. While it is possible to adjust the properties of the diode junction to increase the recovery speed of the diode or to reduce the V
f
of the diode, it is typically impossible to simultaneously lower both the voltage drop across the diode and at the same time decrease the recovery time of the diode in the frame work of a given physical model and a given fabrication method.
In other applications of power rectifiers such a compromise of V
f
or speed is not possible. For example, current high performance PCs are reaching clock speeds in the GHz range. Also, the logic levels in such leading edge PCs operate at low voltages; for example, two volts or even one volt. Therefore, the bus lines and clock lines on the motherboards of such current high performance PCs carry GHz signals at one or two volt levels. The edges of these clock and bus lines will therefore radiate at RF frequencies, potentially creating a variety of interference problems. One approach to circumventing this problem is to shield the radiation sources, typically involving shielding the entire motherboard so as to avoid any RF leaks. This not only adds cost to the manufacturing of the PC but also creates undesirable weight, which is especially undesirable for portable computers. In addition, shielding does not prevent potential interference inside of enclosure.
The most desirable solution to such RF radiation problems from high performance PCs is to clamp the bus and clock lines to ground using a rectifier. However, for GHz frequencies and voltage levels under two volts, diode rectifiers are unable to provide both the needed speed and very low V
f
to function as clamping rectifiers.
Other approaches to power rectifiers are also unable to meet this need. For example, Schottky diodes provide some advantages over pn junction diodes since Schottky diodes have a lower V
f
for a given recovery time than semiconductor diodes. Nonetheless, such Schottky rectifiers suffer from problems such as high leakage current and reverse power dissipation. Also, these problems increase with temperature causing reliability problems for power supply applications. Also, Schottky diodes are typically more expensive than semiconductor junction diodes due to yield problems. The degree of optimization of the compromise between V
f
and reverse recovery time is limited by available set of Schottky Barrier generating metals. It becomes clear that Schottky technology can not satisfy very high speed and very low V
f
required by modern applications.
Synchronous rectifiers have also been designed which avoid some of the problems associated with both Schottky diodes and PN junction diodes for high speed low voltage applications. The current state of such approaches to synchronous rectifiers for high performance rectifier applications is described, for example, in Bob Christiansen, et al. “Synchronous Rectification”,
PCIM,
August 1998. However, currently available synchronous rectifiers are also unable to provide the speed and low V
f
levels needed for such GHz, low voltage clamping applications. Due to the fact that a synchronous rectifier is in fact a combination of a Power MOSFET and a complex IC, controlling the Power MOSFET, it may not be possible even in principal to build circuits fast enough to be capable of effective clamping of computer buss lines
In view of the foregoing, it will be appreciated that none of the existing commercially viable power rectifiers provide all the desirable characteristics needed for applications where both very low V
f
and very fast recovery are needed, such as, for example, low voltage GHz clamping applications in high performance PCs or very high frequency low voltage DC to DC voltage converter applications. Therefore, a need presently exists for a power rectifier device having low on resistance, low V
f
, high speed switching capabilities as well as controllable device characteristics. Furthermore, it will be appreciated that a need presently exists for such a device which is not unduly complex, which is readily compatible with available integrated circuit processing techniques and which may be produced at low cost.
SUMMARY OF THE INVENTION
The present invention provides a power rectifier device having, fast recovery time and very low forward voltage drop. The present invention further provides a method for manufacturing such a rectifier device which is compatible with existing semiconductor technology, which provides a high degree of reliability in device characteristics and which can provide such devices at reduced cost.
In a preferred embodiment, the present invention provides a discrete power rectifier device employing a vertical device structure, i.e., with current flow between the major surfaces of the discrete device. The device employs a large number of parallel connected cells, each comprising a MOSFET structure with a gate to drain short via a common conductive layer. A precisely controlled body implant and a very shallow drain region define a narrow channel region. A metal silicide drain contact merges with the drain region and provides a low resistance electrical contact. This combination provides a very low V
f
path through the channel regions of the MOSFET cells to the source region on the other side of the integrated circuit. This combination also allows very high cell density and controllable device characteristics.
In a further aspect, the present invention provides a method of fabricating a high cell density rectifier device employing relatively few masking steps and which may be implemented at relatively low cost. In a preferred embodiment, the method employs forming a large number of pedestals on the top surface of a semiconductor substrate which pedestals are used to align the structures forming the active cells. A thin gate oxide layer is formed on the substrate adjacent to the pedestals. A first spacer, preferably of polysilicon, is then formed on the gate oxide adjacent the pedestal sidewalls. This is followed by a first implant into the semiconductor substrate, which implant is laterally defined by the first spacer, to form a body region. The first spacer is then removed. A thin metal gate layer is then formed on top of the gate oxide. A second thicker spacer, preferably also of polysilicon, is then formed adjacent the pedestal sidewalls. The metal and oxide layers between the spacers are then etched to the silicon substrate. A second metal layer is then formed over the second spacer and the exposed substrate followed by a second implant of a dopant of a second conductivity type, laterally defined by the second spacer, into the second metal layer. A thermal processing step is then employed to diffuse the dopant into the substrate to form a shallow drain region and to form a metal suicide drain contact which merges with the shallow drain region. Narrow channel regions adjacent the pedestals and below the gate oxide are defined by the shallow drain region and the body implant. First and second electrical contact metallization layers are then formed on the top and bottom surfaces of the substrate, to create a vertical device structure with a current flow path between the surfaces. Since the channel regions are defined by the use of
Chang Paul
Chern Michael
Hsueh Wayne Y. W.
Rodov Vladimir
Advanced Power Devices, Inc.
Chaudhuri Olik
Myers Dawes & Andras LLP
Wille Douglas A.
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