High bond line thickness for semiconductor devices

Details High bond line thickness for semiconductor devices High bond line thickness for semiconductor devices

2007-11-06

2010-11-02

Loke, Steven (Department: 2818)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

With structure for mounting semiconductor chip to lead frame

Reexamination Certificate

active

07825501

ABSTRACT:
Die attach methods used in making semiconductor devices and the semiconductor devices resulting from those methods are described. The methods include providing a leadframe with a die attach pad, using boundary features to define a perimeter on the die pad, depositing a conductive material (such as solder) within the perimeter, and then bonding a die containing an integrated circuit to the die pad by using the conductive material. The boundary features allow an increased thickness of conductive material to be used, resulting in an increased bond line thickness and increasing the durability and performance of the resulting semiconductor device.

REFERENCES:
patent: 6020637 (2000-02-01), Karnezos
patent: 6031771 (2000-02-01), Yiu et al.
patent: 6867460 (2005-03-01), Anderson et al.
patent: 6936855 (2005-08-01), Harrah
patent: 2003/0168731 (2003-09-01), Matayabas, Jr. et al.
patent: 2007/0097740 (2007-05-01), Derhacobian et al.

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