High bit rate cell switching element in CMOS technology

Details High bit rate cell switching element in CMOS technology High bit rate cell switching element in CMOS technology

1993-03-08

1994-11-29

Chin, Wellington

Multiplex communications

Wide area network

Packet switching

3701001, H04L 1256

Patent

active

053696352

ABSTRACT:
The switching element allows building up of ATM exchanges capable of processing cell flows at bit rates higher than 700 Mbit/s. It uses an architecture with output queues, implemented through a unique shared memory, suitably controlled in order to obtain spatial cell switching towards the outputs. ATM cells are converted into a highly parallel format by a structure named rotation memory, where through the cells are then transferred into the master memory. The rotation memory is used also for the inverse operations of format restoration towards the output. The element control circuit is entrusted with the generation of writing and reading addresses of the master memory, in order to carry out the switching proper.

REFERENCES:
patent: 5157654 (1992-10-01), Cisneros
32.times.32 Shared Buffer Type ATM Switch VLSIS for B-ISDN by Takahiko Kozaki et al., Hitachi VLSI Engr. Corp. 1991.
ISSC91/Session 14 Telecommunication Circuits Paper FA 14.5 1991 IEEE International Solid-State Circuits Conference, Tanaka et al.

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