Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor
Reexamination Certificate
1999-05-20
2001-02-06
Loke, Steven H. (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Field effect transistor
C257S012000, C257S194000
Reexamination Certificate
active
06184546
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a semiconductor device, and more particularly to a high-barrier gate and tri-step doped channel field-effect transistor
2. Description of Prior Art
Recently, many semiconductor devices with the very thin and sharply doped layer have been developed because of the advancement of film growth techniques, such as MOCVD and MBE and so on. Among them, the Ga
0.51
In
0.49
P epitaxial layer lattices matched to GaAs have been received much attention. GaInP material has the advantages of (1) lower deep level trap; (2) highly selective etch ration between GaInP and GaAs materials; (3) large break down voltage; (4) larger valance band discontinuity between GaInP and GaAs materials; (5) the elimination of DX centers and thermal oxidation as compared to AlGaAs. Therefore, GaInP/GaAs heterostructure has been widely used in high speed and microwave devices, such as heterojunction bipolar transistors (HBT) or heterojunction field-effect transistors (HFET), etc.
SUMMARY OF THE INVENTION
As mentioned above, due to the excellent characteristics of GaInP epitaxial layer. The object of this invention is to provide a high-barrier gate and tri-step doped channel field-effect transistor with an n
+
-GaAs/p
+
-GaInP
-GaAs heterojunctions. The channel contains tri-step doped GaAs layers with different doping level and thickness in each layer. Due to the significant conduction band discontinuity &Dgr;E
C
between the GaInP/GaAs heterointerface in the gate region, the gate barrier is increased and electrons are effectively confined in the channel. Furthermore, the existence of a valance band discontinuity &Dgr;E
v
at the GaInP/GaAs heterointerface may prevent holes generated by impact ionization from reaching the gate regime. The tri-step doped channel can increase the output current and linear transconductance. The device of this invention has the characteristics of high gate-drain breakdown voltage, low leakage current and high transconductance, etc. Based on these advantages, the device shows promise in high-power, large signal analog and digital switching circuit applications.
Moreover, the “camel gate”-like structure has the following advantages: (1) the ohmic contact gate can eliminate the difficulty of making a metal-semiconductor contact; (2) the gate barrier height is large and adjustable, however it is not fixed and is affected by the applied gate voltages; (3) the potential for improving reliability under conditions of high power dissipation.
REFERENCES:
patent: 5389802 (1995-02-01), Ohno
patent: 5521404 (1996-05-01), Kikkawa et al.
patent: 5548139 (1996-08-01), Ando
patent: 5635735 (1997-06-01), Miyamoto et al.
patent: 5701020 (1997-12-01), Liu et al.
patent: 5789771 (1998-08-01), Liu et al.
Chang W. L.
Liu W. C.
Lour W. S.
Hu Shouxiang
Ladas & Parry
Loke Steven H.
National Science Council
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