High bandwidth plural spot video processor

Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry

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358107, H04N 514

Patent

active

049105965

ABSTRACT:
A high bandwidth multiple spot video processing system includes a mosaic array, a dual memory buffer, and a processor. The array and dual memory buffer, operative independently of the processor, are cooperative to provide digital data representative of the spatial intensity distribution of a two-dimensional input signal incident on the mosaic array at a selectable frame rate. A buffer controller, coupled to the processor and to the dual memory buffer, for implementing a communications protocol that allows the processor to selectively operate in a mode synchronous with the data frame rate or asynchronous with the data frame rate to respectively provide a real-time processing mode and a special processing capability. The dual memories of the dual memory buffer each share the same address space of the global memory of the processor. In the real-time processing mode, the buffer memories are physically switched between the array and the processor such that while one buffer memory is being read by the processor the other buffer memory is being written by the photoarray. Speed up and signal conditioning electronics associated with the photoarray are included in the processing system.

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