High bandwidth interleaved buffer memory and control

Details High bandwidth interleaved buffer memory and control High bandwidth interleaved buffer memory and control

1988-03-31

1989-10-17

Griffin, Robert L.

Multiplex communications

Wide area network

Packet switching

370 60, 34082505, H04Q 1104, H04J 302

Patent

active

048752061

ABSTRACT:
A high capacity metropolitan area network (MAN) is described. Data traffic from users is connected to data concentrators at the edge of the network, and is transmitted over fiber optic data links to a hub where the data is switched. The hub includes a plurality of data switching modules, each having a control means, and each connected to a distributed control space division switch. Advantageously, the data switching modules, whose inputs are connected to the concentrators, perform all checking and routing functions, while the 1024.times.1024 maximum size space division switch, whose outputs are connected to the concentrators, provides a large fan-out distribution network for reaching many concentrators from each data switching module. Distributed control of the space division switch permits several million connection and disconnection actions to be performed each second, while the pipelined and parallel operation within the control means permits each of the 256 switching modules to process at least 50,000 transactions per second. The data switching modules chain groups of incoming packets destined for a common outlet of the space division switch so that only one connection in that switch is required for transmitting each group of chained packets from a data switching module to a concentrator. MAN provides security features including a port identification supplied by the data concentrators, and a check that each packet is from an authorized source user, transmitting on a port associated with that user, to an authorized destination user that is in the same group (virtual network) as the source user. The data switching modules each use a synchronous data ring for transporting data packets between data link handlers and a plurality of memory access controllers and their associated memory modules.

REFERENCES:
patent: 4491945 (1985-01-01), Turner
patent: 4698803 (1987-10-01), Haselton et al.
patent: 4752924 (1988-06-01), Darnell et al.
patent: 4780870 (1988-10-01), McHarg et al.
D. Boettle et al., "High Speed (140 Mbits/s) Switching Techniques for Broadband Communication", Proceedings of IEEE International Seminar on Digital Communications, Zurich, Switzerland, Mar. 11-13, 1986, pp. 97-100.
A. D. Fergeson et al., "The AT&T Interprocess Message Switch Architecture", Proceedings of IEEE International Conference on Communications, Seattle, Wash., 1987.

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