High bandwidth fast settling time operational amplifier and meth

Amplifiers – With semiconductor amplifying device – Including differential amplifier

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330253, 330300, H03F 345, H03F 316

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active

057606471

ABSTRACT:
A wide bandwidth fast settling operational amplifier (71) comprises a first stage (72) and a second stage (73). The first stage attenuates a differential input signal applied to the operational amplifier (71). The second stage (73) provides all the gain of the operational amplifier (71). The first stage is a wide bandwidth stage having a differential input transistor pair (74,75) coupled in a voltage follower configuration. The differential input transistor pair (74,75) are degenerated by resistors (76,77) to reduce voltage gain and to lower an impedance coupled to the second stage (73). The first stage (72) is biased via a current source. The first stage (72) provides a reference voltage to the second stage that corresponds to and varies with an input common mode voltage. The reference voltage is used to bias a cascode stage in the second stage (73) to increase common mode range.

REFERENCES:
patent: 4626794 (1986-12-01), Sugimoto
patent: 4714894 (1987-12-01), Gulczynski
patent: 5334948 (1994-08-01), Fong et al.
patent: 5343164 (1994-08-01), Holmdahl
patent: 5602508 (1997-02-01), Endou et al.
"Relationship Between Frequency Response and Settling Time of Operational Amplifiers", B. Yeshwant Kamath, Robert G. Meyer, Paul R. Gray, Joint Services Electronics Program, May 13, 1974, pp. 347-352.
"BiCMOS Operational Amplifier with Precise and Stable DC Gain for High-Frequency Switched Capacitor Circuits", A. Baschirotto, R. Alini, R. Castello, Electronic Letters, 18th Jul. 1991, vol. 27, No. 15, pp. 1338-1340.
"MOS Operational Amplifier Design -A Tutorial Overview", Paul R. Gray, Robert G. Meyer, IEEE Journal of Solid-State Circuits, vol. SC-17, No. 6, Dec. 1982, pp. 969-982.
"National Bipolar Op Amp Gives Super DC Input Performance", Electronic Design 23, Nov. 8, 1979, p. 15.

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