High bandwidth communications system having multiple serial link

Multiplex communications – Wide area network – Packet switching

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Details

370 99, 3701001, 370112, 375260, 371 371, 341100, 341101, H04J 306, H04Q 1104

Patent

active

055703569

ABSTRACT:
A data communication system includes a phase splitting circuit to split a high speed parallel data word into a number of individual parallel data bytes, a byte multiplexor for each of the phases of a phase splitting circuit, encoding and serialization circuits for converting each byte such as an 8-bit byte to an encoded form suitable for serial transmission such as by employing the Widmer et al. 8-bit/10-bit code, transmitting each encoded byte across one of a number of serial transmission links to a receiving device where the data is deserialized and decoded to recover the original byte which is then synchronized by a byte synchronization circuit. The byte synchronization circuits are then coupled to a word synchronization circuit where the original high bandwidth data word is recovered and transmitted on an internal high speed parallel bus within the receiving device.

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patent: 4991172 (1991-02-01), Cidon et al.
patent: 5065396 (1991-11-01), Castellano et al.
patent: 5231649 (1993-07-01), Duncanson
patent: 5241541 (1993-08-01), Farrell et al.
patent: 5251210 (1993-10-01), Mann et al.
patent: 5293378 (1994-03-01), Shimizu

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