High aspect ratio via etch

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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Details

C438S706000, C438S719000, C430S314000

Reexamination Certificate

active

07807583

ABSTRACT:
A method for patterning high aspect ratio vias is provided. More specifically a dry etching method is provided for patterning deep vias or vias with high aspects ratios thereby eliminating the hard mask undercut. A method is provided to create (pattern) deep vias in a substrate for use in three dimensional stacked semiconductor devices and/or structures. More specifically, a method is provided for patterning deep vias with an aspect ratio up to 10 into a Si substrate with smooth via sidewalls and sufficient slope to enable metallization.

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patent: 2004/0259325 (2004-12-01), Gan
patent: 2005/0001326 (2005-01-01), Masuda
patent: 2005/0085047 (2005-04-01), DeLoach et al.
patent: 2005/0274691 (2005-12-01), Park
patent: 2006/0273465 (2006-12-01), Tamura
patent: 0149330 (1985-07-01), None
patent: 2003 031520 (2003-01-01), None
patent: 2004 207319 (2004-07-01), None
patent: WO 2006 086337 (2006-08-01), None

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