High aspect ratio gated emitter structure, and method of making

Details High aspect ratio gated emitter structure, and method of making High aspect ratio gated emitter structure, and method of making

1997-09-25

1999-10-12

Jackson, Jr., Jerome

Active solid-state devices (e.g., transistors, solid-state diode

Thin active physical layer which is

Low workfunction layer for electron emission

313309, 313336, 313351, H01L 2941, H01J 116, H01J 1910

Patent

active

059658983

ABSTRACT:
A high aspect ratio gated emitter structure and a method of making the structure are disclosed. Emitters may be provided in a densely packed array on a support. Two distinct layers of insulator material may surround the emitters. The lower layer of insulator material may be a non-conformally applied spray-on or spin-on insulator. The non-conformal insulator material may pool at the base regions of the emitters so that the tip regions of the emitters extend out of the lower layer of insulator material. The upper layer of insulator material is applied to the lower layer using a conformal process so that the tip regions of the emitters are covered by the upper layer of insulator material. Gate material is applied to the upper layer of insulator material. Holes are provided in the gate material over the tip regions and wells are provided in the upper layer of insulator material surrounding the tip regions. An etch resistant layer may optionally be provided between the upper layer of insulator material and the gate material.

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