Hierarchically constructed memory having static memory cells

Details Hierarchically constructed memory having static memory cells Hierarchically constructed memory having static memory cells

1991-09-18

1992-12-08

Dixon, Joseph L.

Static information storage and retrieval

Addressing

Plural blocks or banks

36523005, G11C 700

Patent

active

051703750

ABSTRACT:
A static memory is constructed in a plurality of hierarchy levels. Beneficial realization possibilities are set forth with respect to the surface utilization for the drive and read-out circuits in the second hierarchy level which are especially critical. Memory cells that supply a strong cell signal are advantageously utilized so that a low expense is needed in the read circuit. By displacing periphery circuits into higher hierarchy levels, a short access time and a reduced surface requirement arise.

REFERENCES:
patent: 3629612 (1971-12-01), Harbert
patent: 4768172 (1988-08-01), Sasaki
patent: 4984201 (1991-01-01), Sato et al.
patent: 5093809 (1992-03-01), Schmitt-Landsiedel
Mead C., et al. "Highly Concurrent Structures with Global Communications," Introduction to VLSI Systems, 2nd Edition, Addison Wesley, 1980, Chapter 8.5, pp. 313-323.
Sasaki K. et al. "Static RAMs", 1988 IEEE International Solid-State Circuits Conference, 0193-653/88/0000-0174501.00 pp. 174-189.

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