Hierarchical schedules for different ATM traffic

Multiplex communications – Data flow congestion prevention or control – Control of data admission to the network

Reexamination Certificate

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Details

C370S352000, C370S395430, C370S462000, C370S468000

Reexamination Certificate

active

06272109

ABSTRACT:

TECHNICAL FIELD
The present invention relates to techniques and devices for scheduling asynchronous transfer mode (ATM) traffic, for different bit rate services assigned to virtual circuit connections within a plurality of virtual path connections, for transmission over an ATM link.
BACKGROUND ART
Modern society is increasingly dependent on the ability to communicate information. More and more applications require communications of varying quantities of information between users. The trend in communications technology is to develop packet or cell based systems for communications transport and switching at ever higher speeds.
Many services having different requirements drove the development of separate networks. For example, analog voice telephone services utilize a complex network of voice traffic switches, lines and trunks to provide ubiquitous switched voice connectivity virtually throughout the world. The modern telephone network carries most voice traffic in digitized form, typically using time division multiplexing techniques. The switched voice network can carry some data traffic, using modems of ISDN interfaces. However, the telephone network cannot readily switch higher speed data traffic, therefore a variety of separate data networks evolved. Examples of such data networks include X.25, frame relay and SMDS. The construction, operation, maintenance and upgrading of such disparate networks for different services are increasingly complex and expensive, particularly as traffic demands continue to increase.
Asynchronous transfer mode (ATM) transport, an advanced, high-speed packet switching technology, has emerged as the latest form of packet or cell based switching. ATM promises fast cell switching for wide ranges of traffic demands. In ATM, information is organized into cells having a fixed length and format. Each cell includes a header, primarily for identifying cells relating to the same virtual connection, and an information field or “payload”.
The ATM standard defines a cell size of 53 bytes or octets. The first five bytes of each cell form a header, and the remaining 48 bytes represent payload data. The header of each cell includes a field for a virtual path identifier (VPI) and a Virtual circuit identifier (VCI), to identify the particular communication to which each cell relates.
ATM is intended to carry virtually any type of information that can be expressed in or converted to digital form, from voice telephone traffic, to real-time video, to high-speed file transfers, to faster than real-time video, etc. ATM based networks are eliminating the need for different networks to carry different types of traffic. In ATM, transfer is asynchronous in the sense that the recurrence of cells that contain information from any particular sender is not necessarily periodic. Each device using the ATM network submits a cell for transfer when it has a cell to send, not when they have an assigned or available transmission time slot. Once scheduled and aggregated, the ATM cells ride in synchronous slots on a high-speed media, such as a SONET optical fiber. ATM allows any arbitrary information transfer rate up to the maximum supported by the ATM network, simply by transmitting cells more often as more bandwidth is needed.
Different types of communication require different transport rates. Also, different communications require different levels of service quality, referred to as quality of service or QoS. For example, real-time video transmission requires a high constant bit rate to maintain synchronism, whereas packet data communications do not.
Although the ATM standard specifies both virtual path and virtual circuit switching, devices currently available utilize only virtual circuit connection or VCC based routing. For example, a user network interface (UNI) is known which provides constant bit rate (CBR) and available bit rate (ABR) services using a single virtual path connection (VPC) identifier. CBR service takes precedence over ABR traffic. Each time that there is an opportunity for a CBR circuit to transmit, the interface transmits a cell for that circuit. If the circuit presents no data to send, the interface sends cells from the circuits assigned ABR.
The various circuits are differentiated as different virtual circuit connections (VCCs) having different VCC identifiers, both internally in the interface and in the headers of the transmitted cells. The user network interface runs a VCC based scheduler, to schedule transmission of cells for the various services. To provide CBR service, the scheduler maintains a CBR table. This table includes a VCC identifier for each circuit subscribing to CBR service in the order that service is scheduled for the respective circuits. Constant bit rate service takes precedence over available bit rate service. A table pointer traverses the CBR table at the link cell rate. Each time that the pointer points to a listing in the table that contains the VCC identifier for a circuit subscribing to constant bit rate service, the user network interface will transmit one cell from that circuit. Thus, each CBR circuit receives a percentage of the CBR link bandwidth proportional to the number of listings for the circuit in the table divided by the total number of listings in the table. For example, if VC
1
appears in every other slot in the table (half the slots of the table), then the user network interface schedules an opportunity for that VCC to transmit a cell every other cell transmit time. The virtual circuit connection VC
1
has the opportunity to use half of the link bandwidth.
Each time that the scheduler within the user network interface accesses a listing or slot in the CBR, the scheduler also accesses the next listing or slot in an ABR table. Thus, when the schedule reads a listing from the CBR table, it also reads a listing from the ABR table. Each listing in the ABR table comprises head and tail link list pointers. These link list pointers point to the beginning and end of a link list of VCC identifiers for circuits subscribing to available bit rate service. The scheduler moves the accessed link list of VCC identifiers to a work list. In this manner, the scheduler accumulates a work list of ABR circuit identifiers as the interface runs through cell times of the ATM link. Whenever a cell transmit opportunity is not used by a constant bit rate service, the scheduler ideally would go through the accumulated work list until it finds a virtual circuit having a cell to send and enables transmission of the cell from that circuit.
The CBR table is static. The ABR table, however, is dynamic. If the processing through the ABR work list enables an ABR service type circuit to actually transmit a cell, then the scheduler removes the served circuit VCC from the work list. This VCC is put back on the ABR table, but at a specifically selected point further down the table. The selection of that point in the table effectively reschedules the service for the sequence of listed ABR circuits. The distance that the listing is moved down the table depends on the type of flow control algorithm in use.
The prior art system assumed all traffic was within one virtual path, for example identified by a virtual path identifier (VPI) of 0. The ATM link may be viewed as a pipe, running from the interface to the next node of the ATM network. The CBR and ABR table approach provides constant bit rate service and available bit rate service, but the use of one VP or VPC for all such services limits the ability to provide such services to a large number of circuits through a single interface. All of the service is within the one pipe defined by the one VPC. The use of a single VPC limits the ability to segregate the bandwidth of the ATM pipe from the user network interface to the next node of the ATM network. The ATM pipe can carry cells from only a certain number of circuits and can support only so many CBR circuits. Also, the interface supports only the two types of services and cannot easily support those services in combination with other services, such as variable bit r

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