Hierarchical recursive motion estimator for video images...

Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal

Reexamination Certificate

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C375S240210, C375S240240

Reexamination Certificate

active

06414997

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to the field of video image processing, and, more particularly, to video coders compliant with the MPEG-2 standard.
BACKGROUND OF THE INVENTION
The concept of motion estimation is that a set of pixels of a field of a picture may be placed in a position of the subsequent picture obtained by translating the preceding one. These transpositions of objects may expose to the video camera parts that were not visible before as well as changes of their shape, e.g., zooming.
The family of algorithms suitable to identify and associate these portions of images is generally referred to as motion estimation. Such an association permits calculation of the portion of a difference image by removing the redundant temporal information making more effective the subsequent process of compression by DCT, quantization and entropic coding. A typical example of such a method is found in the MPEG-2 standard. A typical block diagram of a video MPEG-2 coder is depicted in FIG.
1
. Such a system is made up of the following functional blocks.
Field ordinator. This block includes one or more field memories outputting the fields in the coding order required by the MPEG-2 standard. For example, if the input sequence is I B B P B B P etc., the output order will be I P B B P B B . . . . The intra-coded picture I is a field and/or a semifield containing temporal redundance. The predicted-picture P is a field and/or a semifield from which the temporal redundance with respect to the preceding I or P (previously co-decoded) picture has been removed. The biredictionally predicted-picture B is a field and/or a semifield whose temporal redundance with respect to the preceding I and subsequent P (or preceding P and successive P) picture has been removed. In both cases, the I and P pictures must be considered as already co/decoded. Each frame buffer in the format 4:2:0 occupies the following memory space:
standard



PAL
720
×
576
×
8



for



the



luminance



(
Y
)


=
3

,

317

,

760



bit

360
×
288
×
8



for



the



chrominance



(
U
)
=


829

,

440



bit

360
×
288
×
8



for



the



chrominance



(
V
)
=


829

,

440



bit
_

total



Y
+
U
+
V


=
4

,

976

,

640



bit
standard



NTSC
720
×
480
×
8



for



the



luminance



(
Y
)


=
2

,

764

,

800



bit

360
×
240
×
8



for



the



chrominance



(
U
)
=


691

,

200



bit

360
×
240
×
8



for



the



chrominance



(
V
)
=


691

,

000



bit
_

total



Y
+
U
+
V


=
4

,

147

,

200



bit
Motion Estimator. This block removes the temporal redundance from the P and B pictures.
DCT. This block implements the cosine-discrete transform according to the MPEG-2 standard. The I picture and the error pictures P and B are divided in 8*8 blocks of pixels Y, U, V on which the DCT transform is performed.
Quantizer Q. An 8*8 block resulting from the DCT transform is then divided by a quantizing matrix to reduce the magnitude of the DCT coefficients. In such a case, the information associated to the highest frequencies less visible to human sight tends to be removed. The result is reordered and sent to the successive block.
Variable Length Coding (VLC). The codification words output from the quantizer tend to contain a large number of null coefficients, followed by nonnull values. The null values preceding the first nonnull value are counted, and the count figure forms the first portion of a codification word. The second portion represents the nonnull coefficient. These paired values tend to assume values more probable than others. The most probable ones are coded with relatively short words composed of 2, 3 or 4 bits. The least probable ones are coded with longer words. Statistically, the number of output bits is less than in the case such methods are not implemented.
Multiplexer and Buffer. Data generated by the variable length coder, the quantizing matrices, the motion vectors and other syntactic elements are assembled for constructing the final syntax examined by the MPEG-2 standard. The resulting bitstream is stored in a memory buffer. The limit size of which is defined by the MPEG-2 standard and cannot be overfilled. The quantizer block Q respects such a limit by making the division of the DCT 8*8 blocks dependent upon the filling limit of such a memory buffer, and on the energy of the 8*8 source block taken upstream of the motion estimation and the DCT transform process.
Inverse Variable Length Coding (I-VLC). The variable length coding functions specified above are executed in an inverse order.
Inverse Quantization (IQ). The words output by the I-VLC block are reordered in the 8*8 block structure, which is multiplied by the same quantizing matrix that was used for its preceding coding.
Inverse DCT (I-DCT). The DCT transform function is inverted and applied to the 8*8 block output by the inverse quantization process. This permits passing from the domain of spatial frequencies to the pixel domain.
Motion Compensation and Storage. At the output of the I-DCT block the following may alternatively be present. A decoded I picture or semipicture that must be stored in a respective memory buffer for removing the temporal redundance with respect to subsequent P and B pictures. A decoded prediction error picture or semipicture P or B that must be summed to the information removed previously during the motion estimation phase. In case of a P picture, such a resulting sum stored in a dedicated memory buffer is used during the motion estimation process for the successive P pictures and B pictures. These field memories are generally distinct from the field memories that are used for re-arranging the blocks.
Display Unit. This unit converts the pictures from the format 4:2:0 to the format 4:2:2, and generates the interlaced format for displaying the images. Arrangement of the functional blocks depicted in
FIG. 1
into an architecture implementing the above-described coder is shown in
FIG. 2. A
distinctive feature is that the field ordinator block, the motion compensation and storage block for storing the already reconstructed P and I pictures, and the multiplexer and buffer block for storing the bitstream produced by the MPEG-2 coding are integrated in memory devices external to the integrated circuit of the core of the coder. The decoder accesses the memory devices through a single interface suitably managed by an integrated controller.
Moreover, the preprocessing block converts the received images from the format 4:2:2 to the format 4:2:0 by filtering and subsampling the chrominance. The post-processing block implements a reverse function during the decoding and displaying phase of the images.
The coding phase also uses the decoding for generating the reference pictures to make operative the motion estimation. For example, the first I picture is coded, then decoded, stored as described in the motion compensation and storage block, and used for calculating the prediction error that will be used to code the subsequent P and B pictures. The play-back phase of the data stream previously generated by the coding process uses only the inverse functional blocks I-VLC, I-Q, I-DCT, etc., never the direct functional blocks. From this point of view, it may be said that the coding and the decoding implemented for the subsequent

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