Hierarchical memory system with variable regulation and priority

Details Hierarchical memory system with variable regulation and priority Hierarchical memory system with variable regulation and priority

1982-03-03

1985-07-16

Thomas, James D.

Boots, shoes, and leggings

G06F 1300, G06F 906

Patent

active

045300550

ABSTRACT:
In a hierarchical memory system, replacement of segments in a cache memory is governed by a least recently used algorithm, while trickling of segments from the cache memory to the bulk memory is governed by the age since first write. The host processor passes an AGEOLD parameter to the memory subsystem and this parameter regulates the trickling of segments. Unless the memory system is idle (no I/O activity), no trickling takes place until the age of the oldest written-to segment is at least as great as AGEOLD. A command is generated for each segment to be trickled and the priority of execution assigned to such commands is variable and determined by the relationship of AGEOLD to the oldest age since first write of any of the segments. If the subsystem receives no command from the host processor for a predetermined interval, AGEOLD is ignored and any written-to segment becomes a candidate for trickling.

REFERENCES:
patent: 4020466 (1977-04-01), Cordi et al.
patent: 4044337 (1977-08-01), Hicks et al.
patent: 4077059 (1978-02-01), Cordi et al.
patent: 4084231 (1978-04-01), Capozzi et al.
patent: 4168541 (1979-09-01), Dekarske
patent: 4394732 (1983-07-01), Swenson
patent: 4394733 (1983-07-01), Swenson
patent: 4420807 (1983-12-01), Nolta et al.
patent: 4467411 (1984-08-01), Fry et al.

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