Data processing: structural design – modeling – simulation – and em – Emulation – Of peripheral device
Reexamination Certificate
2005-12-13
2005-12-13
Teska, Kevin J. (Department: 2128)
Data processing: structural design, modeling, simulation, and em
Emulation
Of peripheral device
C703S023000, C714S727000, C714S726000, C714S724000
Reexamination Certificate
active
06975980
ABSTRACT:
An integrated circuit can have plural core circuits, each having a test access port that is defined in IEEE Standard 1149.1. Access to and control of these ports is though a test linking module. The test access ports on an integrated circuit can be arranged in a hierarchy with one test linking module controlling access to plural secondary test linking modules and test access ports. Each secondary test linking module in turn can also control access to tertiary test linking modules and test access ports. The test linking modules can also be used for emulation.
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Bassuk Lawrence J.
Brady W. James
Ferris, III Fred O
Telecky , Jr. Frederick J.
Teska Kevin J.
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