Hierarchical decoding of a memory device

Details Hierarchical decoding of a memory device Hierarchical decoding of a memory device

1998-09-04

2000-02-29

Nguyen, Viet Q.

Static information storage and retrieval

Addressing

Particular decoder or driver circuit

36523001, 36523003, G11C 700

Patent

active

060317841

ABSTRACT:
In one aspect of the invention, a circuit for the hierarchical decoding of a memory device includes a local word line for accessing a memory cell. A local word line driver, which drives the local word line, has at most two transistors, each of these transistors coupled to the local word line. In another aspect of the invention, a circuit for the hierarchical decoding of a memory device includes a local word line driver for driving a local word line. A local phase line driver is connected to the local word line driver by a single metal line. The local phase line driver cooperates with the local word line driver for accessing a memory cell.

REFERENCES:
patent: 5570319 (1996-10-01), Santoro et al.
patent: 5586080 (1996-12-01), Raad et al.
patent: 5774412 (1998-06-01), Raad et al.
patent: 5886923 (1999-03-01), Hung
patent: 5917744 (1999-06-01), Kirihata et al.

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