Hierarchical connection method, apparatus, and protocol

Details Hierarchical connection method, apparatus, and protocol Hierarchical connection method, apparatus, and protocol

1994-06-13

1997-04-01

Kizou, Hassan

Multiplex communications

Pathfinding or routing

Switching a message which includes an address header

370241, 371 223, 39518306, 34082552, H04J 324, G01R 3128

Patent

active

056174209

ABSTRACT:
A protocol and associated circuitry operable for efficiently extending serial bus capability into multi-level system environments is disclosed. The protocol is designed to coexist and be fully compatible with existing serial bus approaches, or being used as a standalone serial communications bus. The circuitry and protocol described enable the use of a common serial bus in a hierarchically arranged system or network, so that a primary serial bus master device can selectively access any device at any level or position in the network, and send and receive messages and commands to and from the device. The invention disclosed accomplishes this without modifying the existing serial bus protocol, without adding additional signals and without affecting the throughput rate of the serial bus it may be used with. Alternative embodiments applying the invention to a cabled system are described. Additional preferred embodiments are also disclosed.

REFERENCES:
patent: 4710931 (1987-12-01), Bellay et al.
patent: 4872169 (1989-10-01), Whetsel, Jr.
patent: 5056093 (1991-10-01), Whetsel
patent: 5115435 (1992-05-01), Langford, II et al.
patent: 5132635 (1992-07-01), Kennedy
Hierarchical Self-Test Concept Based on the JTAG Standard, Johann Maierhofer, IEEE Int'l. Test Conference 1990, pp. 127-134.
An Architecture for Extending the IEEE Standard 1149.1 Test Access Port to System Backplanes, by Dilip Bhavsar, International Test Conference 1991, pp. 768-776.

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