Boots – shoes – and leggings
Patent
1983-06-10
1986-09-16
Krass, Errol A.
Boots, shoes, and leggings
364488, G06F 15606
Patent
active
046126180
ABSTRACT:
High gate count integrated circuits (ICs) are designed in a heirarchical manner. In a first pass through a computer design system basic cells are composed to form one-level-up building block cells. In a second pass through the same computer design system the one-level-up building block cells are used as "basic" cells and composed to form a two-level-up structure which may be a building block cell or a chip.
REFERENCES:
patent: 4377849 (1983-03-01), Finger et al.
patent: 4484292 (1984-11-01), Hong et al.
patent: 4523106 (1985-06-01), Tanizawa et al.
IBM J. Res. Development, May 1981 (V 25, No. 3), "Bipolar Circuit Design for a 5000-Circuit VLSI Gate Array", Dansky, pp. 116-125.
IEEE Spectrum, Jun. 1982 (V 19, No. 6), "Automating Chip Layout", S. Trimberger, pp. 38-45.
17th Design Automation Conference Proc., Jun. 1980, "The Genealogical Approach to the Layout Problem", Szepieniec et al., pp. 535-542, published by ACM.
"Building Block Approach and Variable Size Memory for CMOS VLSIs" by Koide et al., Feb. 1983, IEEE International Solid-State Circuits Conference, pp. 148-149 of the Proceedings.
Cowhig William M.
Pryor Richard L.
Krass Errol A.
Ochis Robert
RCA Corporation
Teska Kevin J.
Tripoli Joseph S.
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