Hierarchical computer cache system

Details Hierarchical computer cache system Hierarchical computer cache system

1994-05-12

1996-07-23

Swann, Tod R.

395444, 395445, 395446, 395447, 395449, 395468, 395492, G06F 1200, G06F 1208, G06F 1212, G06F 1300

Patent

active

055398952

ABSTRACT:
A hierarchical cache system comprises a plurality of first level cache subsystems for storing data or instructions of respective CPUs, a higher level cache subsystem containing data or instructions of the plurality of cache subsystems, and a main memory coupled to the higher level cache subsystem. A page mover is coupled to the higher level cache subsystem and main memory, and responds to a request from one of the CPUs to store data into the main memory, by storing the data into the main memory without copying previous contents of a store-to address of the request to the higher level cache subsystem in response to said request. Also, the page mover invalidates the previous contents in the higher level cache subsystem if already resident there when the CPU made the request. A buffering system within the page mover comprises request buffers and data segment buffers to store a segment of predetermined size of the data. When all of the request buffers have like priority and there are fewer request buffers that contain respective, outstanding requests than the number of data segment buffers, the page mover means allocates to the request buffers with outstanding requests use of the data segment buffers for which there are no outstanding requests.

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