Hierarchical bus circuit having decoder generating local buses a

Details Hierarchical bus circuit having decoder generating local buses a Hierarchical bus circuit having decoder generating local buses a

1991-11-29

1993-08-24

Lee, Thomas C.

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307239, 307443, 370 851, 370 859, 395775, 3642402, 3642407, 3642602, 364DIG1, G06F 1300

Patent

active

052396614

ABSTRACT:
A bus circuit of a precharging type has an hierarchical structure comprising a higher rank bus and a plurality of lower rank buses connected in parallel thereto. A register block is connected to each of the lower rank buses, each register block comprising a plurality of registers connected in parallel to the lower rank bus. Both of the higher and the lower rank buses are precharged. The data of the register selected as a bus source is read onto the higher rank bus, thereby fluctuating a potential on the higher rank bus. Only the electric charges on the selected lower rank bus are discharged in response to the potential fluctuation and the selection signal. The total number of the registers coupled to the lower rank buses is the power of 2.

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