Heuristic bus access arbiter

Details Heuristic bus access arbiter Heuristic bus access arbiter

1997-10-20

1998-08-18

Ray, Gopal C.

395299, 395861, G06F 1318, G06F 1320

Patent

active

057969612

ABSTRACT:
An arbiter connects a plurality of devices to a bus. The arbiter determines priority among the devices based on the relative need of the devices. Relative need is determined for each device based on the fullness of a buffer, such as a first-in first-out buffer, corresponding to each device. A gauge informs the arbiter of the fullness value for each buffer from which relative need, and hence priority, is calculated. In addition, the arbiter can incorporate the speed of each device's buffer into its priority determination. The relative device priorities can thus be changed dynamically as the buffers associated with the devices read and write data via the bus. Similarly, the relative priority of a given device can change when the device changes from an input mode to an output or from an output mode to an input mode.

REFERENCES:
patent: 4285038 (1981-08-01), Suzuki et al.
patent: 5072420 (1991-12-01), Conley et al.
patent: 5247617 (1993-09-01), Olson
patent: 5392033 (1995-02-01), Oman et al.
patent: 5410652 (1995-04-01), Leach et al.
IBM Technical Disclosure Bulletin, vol. 37, No. 10, Oct. 1994, New York; pp. 461 & 462 "Programmable Dynamically-Alterable Request Priority Levels" .

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