Heterojunction semiconductor device with element isolation...

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Field effect transistor

Reexamination Certificate

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C257S020000, C257S024000, C257S093000, C257S192000, C257S194000, C257S200000, C257S201000, C257S339000, C257S348000, C257S349000, C257S374000, C257S392000, C257S402000, C257S409000, C257S446000, C257S499000, C257S500000, C257S501000, C257S502000, C257S503000, C257S504000, C257S505000, C257S506000, C257S507000, C257S508000, C257S509000, C257S510000, C257S513000, C257S524000, C257S527000

Reexamination Certificate

active

10864457

ABSTRACT:
A technique enabling to improve element isolation characteristic of a semiconductor device is provided. An element isolation structure is provided in a semiconductor substrate in which a silicon layer, a compound semiconductor layer and a semiconductor layer are laminated in this order. The element isolation structure is composed of a trench, a semiconductor film, and first and second insulating films. The trench extends through the semiconductor layer and extends to the inside of the compound semiconductor layer. The semiconductor film is provided on the surface of the trench, and the first insulating film is provided on the semiconductor film. The second insulting film is provided on the first insulating film and fills the trench. Since the semiconductor film is interposed between the compound semiconductor film which is exposed by the trench and the first insulating film, there is no possibility that the compound semiconductor layer is directly thermally oxidized even if the semiconductor film is thermally oxidized to form the first insulating film.

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