Heterojunction semiconductor

Metal working – Method of mechanical manufacture – Assembling or joining

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Details

29578, 29580, 29590, H01L 2980, H01L 2948, H01L 29161, H01L 2906

Patent

active

045504890

ABSTRACT:
A heterojunction semiconductor is provided where the carrier transport dimension is governed by a layer thickness and where the characteristics of the materials self-limit process steps. A field effect transistor is provided wherein the work function is matched across regions to reduce limits on the channel dimension. A vertical transistor is provided wherein a vertical web is formed with precise thickness governed by electrolytic etching using photogenerated carrier current.

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patent: 4364072 (1982-12-01), Nishizawa
patent: 4460910 (1984-07-01), Chappell et al.
patent: 4505022 (1985-03-01), Briere

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