Active solid-state devices (e.g. – transistors – solid-state diode – With specified impurity concentration gradient – With high resistivity
Reexamination Certificate
2002-05-03
2004-09-21
Prenty, Mark V. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
With specified impurity concentration gradient
With high resistivity
C257S094000, C257S183000
Reexamination Certificate
active
06794734
ABSTRACT:
CROSS REFERENCE TO RELATED APPLICATIONS
None.
FIELD OF THE INVENTION
This invention relates generally to semiconductor devices, and more particularly to heterojunction semiconductor devices.
BACKGROUND OF THE INVENTION
P-I-N diodes are often used as switching elements in a variety of military and commercial applications. Such applications include automotive collision avoidance systems (CAS), passive radiation imaging systems and radar applications, and switch matrix devices useful for networking (e.g. internet) applications. Presently, P-I-N diodes used in such RF and microwave applications are fabricated as homojunction devices, such as silicon (Si) or gallium arsenide (GaAs) P-I-N diodes. These devices may be used as either discrete or as integrated components for switching functions useful at high frequency operation. Such high frequency operation may range from about one megahertz (MHz) to well above one hundred gigahertz (GHz).
Performance characteristics of present P-I-N switching diodes are often limited by parameters such as insertion loss and isolation. Insertion loss may be characterized as the ratio of the signal power output from the diode relative to the input signal power when the series-measured diode is in the “on” state. Isolation may be characterized as the ratio of the signal power output from the diode relative to the input signal power when the series-measured diode is in the “off” state. (Note that the reverse is true when the diode is measured in the shunt configuration.) A significant problem for P-I-N diode designers is how to reduce insertion loss without compromising isolation. For example, switches such as monolithic integrated single-pole single-throw (SPST), single-pole double-throw (SPDT) switches, and single pole multi-throw (SPMT) switches employing shunt connected P-I-N diodes require reduced reverse bias capacitance, but without undesirably increasing the series resistance within the intrinsic region (I-region) of the diode. Series diode configurations require reduced series resistance but without an undesirable increase in diode capacitance.
It is known that other heterojunction semiconductor devices exist such as bipolar junction transistors (BJTs), HEMTs, and other FET devices. However, such devices are typically N-P-N three terminal devices having base, emitter and collector terminals and are fabricated with a base that is thin enough to enable carriers to diffuse across that region in a relatively short time so that the device can operate at a high frequency. Further, heterojunction transistor devices are used in order to increase gain or amplification. For diode switch design, however, gain is not a consideration. There is a need to decrease the resistance of the diode by increasing the carrier concentration in the intrinsic region. An improved device and process for reducing insertion and return loss while preserving device isolation within a P-I-N diode is highly desired.
SUMMARY OF THE INVENTION
According to an aspect of the invention, a heterojunction P-I-N diode comprises a first layer of doped semiconductor material of a first doping type; a second layer of doped semiconductor material of a second doping type and a substrate on which is disposed the first and second layers. An intrinsic layer of semiconductor material is disposed between the first layer and second layer. The semiconductor material composition of at least one of the first layer and second layer is sufficiently different from that of the intrinsic layer so as to form a heterojunction therebetween. An energy barrier is created in which injected carriers from the junction are confined by the barrier, effectively reducing the series resistance within the I region of the P-I-N diode and the insertion loss relative to that of homojunction P-I-N diodes.
According to another aspect, the invention is embodied in a process of forming a heterojunction P-I-N diode switch comprising forming a semi-insulating substrate; forming a cathode layer by forming on the substrate a first layer of doped semiconductor material of a first doping type; forming an intrinsic layer of semiconductor material on the first layer; and forming an anode layer by forming a second layer of doped semiconductor material of a second doping type on the intrinsic layer, wherein at least one of the first layer and second layer is formed of semiconductor material different from that of the intrinsic layer to create a heterojunction therebetween, thereby providing an energy barrier. In this aspect, the anode and cathode may be reversed.
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Boles Timothy Edward
Brogle James Joseph
Hoag David Russell
MIA-COM
Prenty Mark V.
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