Active solid-state devices (e.g. – transistors – solid-state diode – Thin active physical layer which is – Heterojunction
Patent
1994-06-09
1996-01-23
Crane, Sara W.
Active solid-state devices (e.g., transistors, solid-state diode
Thin active physical layer which is
Heterojunction
257190, 257194, H01L 2906
Patent
active
054867053
ABSTRACT:
A heterojunction FET comprises: a semi-insulation GaAs substrate; and a heterojunction structure, formed on the substrate, having: an active layer including: an undoped InGaAs layer including 10-254 of InAs composition; an undoped GaAs layer formed on the undoped InGaAs layer on the opposite side of the substrate; first and second AlGaAs layers doped with first and second dopants respectively, sandwiching the active layer, the second AlGaAs layer being provided between said active layer and the substrate; and source, gate, and drain electrodes on the heterojunction structure. A first density of the first dopant may be lower than a second density of the second dopant. The first and second dopant may be p or n type. The AlAs composition of the first AlGaAs layer may be lower than that of the second AlGaAs layer. First and second undoped AlGaAs layers sandwiched between the active layer and the first AlGaAs layer and sandwiched between the active layer and the second AlGaAs layer respectively may be provided. The second undoped AlGaAs layer is formed on the side of the substrate. The first and second undoped AlGaAs layers have first and second thicknesses respectively, the first thickness being larger than the second thickness.
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Kusters et al., "Optimized Double Heterojunction Pseudomorphic InP/In.sub.x Ga.sub.1-x As/InP (0.64.gtoreq.x.gtoreq.0.82) p-MODFET's and the Role of Strain in Their Design", IEEE Transactions on Electron Devices, vol. 40, No. 12, Dec. 1993, pp. 2164-2170.
Inoue Kaoru
Masato Hiroyuki
Matsuno Toshinobu
Nakatuka Tadayosi
Bowers Courtney A.
Crane Sara W.
Matsushita Electric - Industrial Co., Ltd.
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